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https://github.com/retroSoC/common.git
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maksyuki
d4de33c291
- Updated license headers to use SPDX format across all RTL files. - Enhanced error checking in various modules (e.g., tech_ram, tech_regfile, bin2gray, gray2bin, lfsr) to validate parameters and prevent invalid configurations. - Refactored FIFO implementation to simplify pointer management and ensure proper handling of push/pop operations. - Introduced new scripts for checking formatting and license headers, ensuring compliance with project standards. - Added style guidelines to maintain consistent coding practices across the RTL codebase. - Updated testbench files to include license headers and maintain compatibility with legacy structures.
11 lines
431 B
Markdown
11 lines
431 B
Markdown
# Verification
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Each `dv/unit/*_tb.sv` testbench is self-checking and finishes with a non-zero
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exit through `$fatal` on failure. Run the portable regression with
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`make test-iverilog`; run the independent simulator implementation with
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`make test-verilator`.
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Protocol models under `rtl/model` and `rtl/verif` are compatibility utilities,
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not part of the synthesis source list. New tests must not rely on a simulator
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vendor library.
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