feat: modify firemware impl

rtl/Makefile

@@ -4,17 +4,29 @@ CFLAGS=
 
 WAVE := NONE
 
-RTL :=
+IP := ./ip/spram_model.v \
+      ./ip/spimemio.v \
+      ./ip/simpleuart.v \
+	  ./ip/i2c_master_bit_ctrl.v \
+      ./ip/i2c_master_byte_ctrl.v \
+      ./ip/simple_i2c_master.v \
+      ./ip/simple_spi_master.v \
+      ./ip/counter_timer.v \
+	  ./ip/spi_slave.v \
+      ./ip/ravenna_spi.v
+
+INC := -I./ip
 # +behv_wave
-retrosim: retrosoc_tb.vvp retrosoc_fw.hex retrosoc_fw.bin
-	vvp -N $< +firmware=retrosoc_fw.hex +behv_$(WAVE)
+retrosim: retrosoc_tb.vvp retrosoc_fw.hex retrosoc_fw.bin retrosoc_fw.txt
+	vvp -N $< +firmware=retrosoc_fw.hex +behv_$(WAVE) -fst
 
 # +syn_wave
 retrosynsim: retrosoc_syn_tb.vvp retrosoc_fw.hex
-	vvp -N $< +firmware=retrosoc_fw.hex +syn_$(WAVE)
+	vvp -N $< +firmware=retrosoc_fw.hex +syn_$(WAVE) -fst
 
-retrosoc_tb.vvp: retrosoc_tb.v retrosoc_asic.v ./ip/spram_model.v ./ip/spimemio.v ./ip/simpleuart.v retrosoc.v picorv32.v ./ip/spiflash.v ../tech/tc_io.v ../tech/tc_clk.v ../tech/tc_sram.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_io/verilog/sg13g2_io.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_core_behavioral_bm_bist.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_1024x16_c2_bm_bist.v
-	iverilog -s retrosoc_tb -o $@ $^
+
+retrosoc_tb.vvp: retrosoc_tb.v retrosoc_asic.v  retrosoc.v picorv32.v $(IP) ./ip/spiflash.v ../tech/tc_io.v ../tech/tc_clk.v ../tech/tc_sram.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_io/verilog/sg13g2_io.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_core_behavioral_bm_bist.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_1024x16_c2_bm_bist.v
+	iverilog $(INC) -s retrosoc_tb -o $@ $^
 
 retrosoc_syn_tb.vvp: retrosoc_tb.v ../syn/yosys/out/retrosoc_yosys.v spiflash.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_io/verilog/sg13g2_io.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_core_behavioral_bm_bist.v ../syn/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_sram/verilog/RM_IHPSG13_1P_1024x16_c2_bm_bist.v
 	iverilog -s retrosoc_tb -o $@ $^
@@ -29,7 +41,7 @@ retrosoc_sections.lds: sections.lds
 	$(CROSS)cpp -P -DRETROSOC -o $@ $^
 
 retrosoc_fw.elf: retrosoc_sections.lds start.s firmware.c
-	$(CROSS)gcc $(CFLAGS) -DRETROSOC -mabi=ilp32 -march=rv32ic -Wl,-Bstatic,-T,retrosoc_sections.lds,--strip-debug -ffreestanding -nostdlib -o retrosoc_fw.elf start.s firmware.c
+	$(CROSS)gcc $(CFLAGS) -DRETROSOC -mabi=ilp32 -march=rv32i -Wl,-Bstatic,-T,retrosoc_sections.lds,--strip-debug -ffreestanding -nostdlib -o retrosoc_fw.elf start.s firmware.c
 
 retrosoc_fw.hex: retrosoc_fw.elf
 	$(CROSS)objcopy -O verilog retrosoc_fw.elf retrosoc_fw.hex
@@ -37,6 +49,9 @@ retrosoc_fw.hex: retrosoc_fw.elf
 retrosoc_fw.bin: retrosoc_fw.elf
 	$(CROSS)objcopy -O binary retrosoc_fw.elf retrosoc_fw.bin
 
+retrosoc_fw.txt: retrosoc_fw.elf
+	$(CROSS)objdump -d retrosoc_fw.elf > retrosoc_fw.txt
+
 # ---- Testbench for SPI Flash Model ----
 spiflash_tb: spiflash_tb.vvp retrosoc_fw.hex
 	vvp -N $< +firmware=retrosoc_fw.hex
@@ -50,7 +65,7 @@ cmos.log: spimemio.v simpleuart.v retrosoc.v ../picorv32.v
 
 # ---- Clean ----
 clean:
-	rm -f *.vvp *.vcd 
+	rm -f *.vvp *.vcd *.fst
 	rm -f *.elf *.hex *.bin
 	rm -f *.log
 	rm -f retrosoc_syn.v

rtl/firmware.c

@@ -31,9 +31,9 @@
 extern uint32_t sram;
 
 #define reg_spictrl (*(volatile uint32_t*)0x02000000)
-#define reg_uart_clkdiv (*(volatile uint32_t*)0x02000004)
-#define reg_uart_data (*(volatile uint32_t*)0x02000008)
-#define reg_leds (*(volatile uint32_t*)0x03000000)
+#define reg_uart_clkdiv (*(volatile uint32_t*)0x03000078)
+#define reg_uart_data (*(volatile uint32_t*)0x0300007c)
+// #define reg_leds (*(volatile uint32_t*)0x04000000)
 
 // --------------------------------------------------------
 
@@ -166,7 +166,7 @@ char getchar_prompt(char *prompt)
     uint32_t cycles_begin, cycles_now, cycles;
     __asm__ volatile ("rdcycle %0" : "=r"(cycles_begin));
 
-    reg_leds = ~0;
+    // reg_leds = ~0;
 
     if (prompt)
         print(prompt);
@@ -178,12 +178,12 @@ char getchar_prompt(char *prompt)
             if (prompt)
                 print(prompt);
             cycles_begin = cycles_now;
-            reg_leds = ~reg_leds;
+            // reg_leds = ~reg_leds;
         }
         c = reg_uart_data;
     }
 
-    reg_leds = 0;
+    // reg_leds = 0;
     return c;
 }
 
@@ -473,15 +473,15 @@ void cmd_echo()
 
 void main()
 {
-    reg_leds = 31;
+    // reg_leds = 31;
     // reg_uart_clkdiv = 104; // for 100M
     reg_uart_clkdiv = 52; // for 50M
     print("Booting..\n");
 
-    reg_leds = 63;
+    // reg_leds = 63;
     set_flash_qspi_flag();
 
-    reg_leds = 127;
+    // reg_leds = 127;
     // while (getchar_prompt("Press ENTER to continue..\n") != '\r') { /* wait */ }
 
     print("\n");

rtl/start.s

@@ -36,9 +36,9 @@ addi x30, zero, 0
 addi x31, zero, 0
 
 # Update LEDs
-li a0, 0x03000000
-li a1, 1
-sw a1, 0(a0)
+# li a0, 0x04000000
+# li a1, 1
+# sw a1, 0(a0)
 
 # zero initialize entire scratchpad memory
 li a0, 0x00000000
@@ -47,10 +47,19 @@ sw a0, 0(a0)
 addi a0, a0, 4
 blt a0, sp, setmemloop
 
+# li a0, 0x00000000
+# checkmemloop:
+# lw a1, 0(a0)
+# bne a1, a0, ERROR
+# addi a0, a0, 4
+# blt a0, sp, checkmemloop
+
+# ERROR:
+# j ERROR
 # Update LEDs
-li a0, 0x03000000
-li a1, 3
-sw a1, 0(a0)
+# li a0, 0x04000000
+# li a1, 3
+# sw a1, 0(a0)
 
 # copy data section
 la a0, _sidata
@@ -66,9 +75,9 @@ blt a1, a2, loop_init_data
 end_init_data:
 
 # Update LEDs
-li a0, 0x03000000
-li a1, 7
-sw a1, 0(a0)
+# li a0, 0x04000000
+# li a1, 7
+# sw a1, 0(a0)
 
 # zero-init bss section
 la a0, _sbss
@@ -81,9 +90,9 @@ blt a0, a1, loop_init_bss
 end_init_bss:
 
 # Update LEDs
-li a0, 0x03000000
-li a1, 15
-sw a1, 0(a0)
+# li a0, 0x04000000
+# li a1, 15
+# sw a1, 0(a0)
 
 # call main
 call main