feat: refactor NMI interface and enhance performance logging

- Updated NMI interface references from  to  in multiple files for consistency.
- Added a new script  to convert UART performance records into structured JSON format.
- Enhanced the README documentation to include details about the new performance log parser.
- Implemented tests for the new performance log parser to ensure correct functionality.
- Added new test cases for DMA error handling and SDRAM data integrity to improve coverage.
- Updated existing test cases to accommodate changes in the NMI interface and added performance metrics.
- Refactored bus fault testbench to include fault code checks and improved error handling.
- Adjusted memory map generation and pin mapping tests to reflect recent changes in RTL structure.

configs/benchmark/ihp130-hazard3.mk

@@ -0,0 +1,12 @@
+SOC             := MINI
+CORE            := HAZARD3
+PDK             := IHP130
+HAVE_PLL        := NO
+HAVE_SRAM_IF    := YES
+HAVE_SRAM_MACRO := YES
+PDK_BEHAV       := YES
+HAVE_SVA        := NO
+ISA             := RV32IM
+HAVE_CSR        := NO
+APP             := benchmark
+LINK_TYPE       := ld2_sram