fix: sync publication source bindings and storage geometry after APU merge

- system-reference.json: APU RX stream tready now feeds the KWS engine
  (s_kws_rx_ready) instead of a constant 0
- diagram-layouts.json: APUMC header packs the requested abi word and
  entry words mask entry_pc/first_pc/last_pc for APUMC V2
- diagram-storage.json: APU control store implements the 4096-word
  (32 KiB) V1.1 refreeze
- diagram-circuits.json: pre-existing GA2D master 6 missing from the two
  axi4_data_crossbar master_read_limit bindings (broken on dev before
  the merge)
- test_script_tools.py: pre-existing whitespace-strict SOC_SIM_TIME
  assertion broken by dev's app.mk alignment change (failed on dev
  before the merge); use the test's regex idiom

publications/datasheets/diagram-circuits.json

@@ -9676,7 +9676,7 @@
           },
           {
             "file": "rtl/mini/top/axi4_data_crossbar.sv",
-            "text": "function automatic logic [CountWidth-1:0] master_read_limit(input int unsigned master); if ((master <= 2) || (master == 7)) return CountWidth'(4); if ((master == 3) || (master == 4)) return CountWidth'(2); if (master == 5) return CountWidth'(1); if (master == 8) return CountWidth'(1); return '0; endfunction"
+            "text": "function automatic logic [CountWidth-1:0] master_read_limit(input int unsigned master); if ((master <= 2) || (master == 7)) return CountWidth'(4); if ((master == 3) || (master == 4)) return CountWidth'(2); if ((master == 5) || (master == 6) || (master == 8)) return CountWidth'(1); return '0; endfunction"
           }
         ],
         "instance_ports": [
@@ -11513,7 +11513,7 @@
           },
           {
             "file": "rtl/mini/top/axi4_data_crossbar.sv",
-            "text": "function automatic logic [CountWidth-1:0] master_read_limit(input int unsigned master); if ((master <= 2) || (master == 7)) return CountWidth'(4); if ((master == 3) || (master == 4)) return CountWidth'(2); if (master == 5) return CountWidth'(1); if (master == 8) return CountWidth'(1); return '0; endfunction"
+            "text": "function automatic logic [CountWidth-1:0] master_read_limit(input int unsigned master); if ((master <= 2) || (master == 7)) return CountWidth'(4); if ((master == 3) || (master == 4)) return CountWidth'(2); if ((master == 5) || (master == 6) || (master == 8)) return CountWidth'(1); return '0; endfunction"
           }
         ],
         "instance_ports": [

publications/datasheets/diagram-layouts.json

@@ -211,7 +211,7 @@
       },
       {
         "file": "scripts/apu_isa.py",
-        "text": "APUMC_MAGIC, APUMC_ABI, total_bytes, len(instructions), APUMC_INSTRUCTION_OFFSET, table_offset, len(table_payload), APUMC_HEADER_BYTES, APUMC_ENTRY_COUNT, required_mask, scratch_end, crc, build_id & 0xFFFFFFFF, (build_id >> 32) & 0xFFFFFFFF, 0, 0,"
+        "text": "APUMC_MAGIC, abi, total_bytes, len(instructions), APUMC_INSTRUCTION_OFFSET, table_offset, len(table_payload), APUMC_HEADER_BYTES, APUMC_ENTRY_COUNT, required_mask, scratch_end, crc, build_id & 0xFFFFFFFF, (build_id >> 32) & 0xFFFFFFFF, 0, 0,"
       }
     ],
     "order": "lsb",
@@ -346,7 +346,7 @@
     "bindings": [
       {
         "file": "scripts/apu_isa.py",
-        "text": "self.format_id | (self.entry_pc << 4), self.first_pc | (self.last_pc << 16), self.scratch_base, self.scratch_bytes, self.max_loop_count, self.max_retired, self.primitive_mask, self.table_offset | (self.table_bytes << 16),"
+        "text": "self.format_id | ((self.entry_pc & entry_mask) << 4), (self.first_pc & range_mask) | ((self.last_pc & range_mask) << 16), self.scratch_base, self.scratch_bytes, self.max_loop_count, self.max_retired, self.primitive_mask, self.table_offset | (self.table_bytes << 16),"
       }
     ],
     "order": "lsb",

publications/datasheets/diagram-storage.json

@@ -601,7 +601,7 @@
     "stores": [
       {
         "title": "64-bit instruction words",
-        "depth": 2048,
+        "depth": 4096,
         "bits": 64,
         "depth_ref": {
           "file": "rtl/ip/multimedia/apu_control_store.sv",
@@ -618,7 +618,7 @@
       "rtl/ip/multimedia/apu_control_store.sv"
     ],
     "bindings": [],
-    "note": "The current loader/fetch address is 11 bits, selecting 2,048 64-bit words (16 KiB). The later 4,096-word / 32 KiB refreeze is not implemented by this snapshot. Instruction memory and local data memory are separate spaces."
+    "note": "The loader/fetch address is 12 bits, selecting 4,096 64-bit words (32 KiB) per the implemented V1.1 refreeze. Instruction memory and local data memory are separate spaces."
   },
   {
     "id": "apu-local",

publications/datasheets/system-reference.json

@@ -5904,7 +5904,7 @@
       },
       {
         "file": "rtl/ip/multimedia/apb4_apu.sv",
-        "text": "assign u_apu_rx_axis.tready = 1'b0;"
+        "text": "assign u_apu_rx_axis.tready = s_kws_rx_ready;"
       }
     ],
     "sdio_command": [

tests/test_script_tools.py

@@ -1210,7 +1210,7 @@ def test_benchmark_profile_uses_functional_sram_and_reserved_data() -> None:
     assert re.search(r"^HAVE_SRAM_MACRO\s*:= YES$", profile, re.MULTILINE)
     assert re.search(r"^SRAM_SIZE_KIB\s*:= 32$", profile, re.MULTILINE)
     assert re.search(r"^PDK_BEHAV\s*:= YES$", profile, re.MULTILINE)
-    assert "SOC_SIM_TIME ?= 600" in benchmark_profile
+    assert re.search(r"^SOC_SIM_TIME\s+\?= 600$", benchmark_profile, re.MULTILINE)
     assert "VERILATOR_SIM_ARGS ?= --fast-flash" in benchmark_profile
     offset_match = re.search(
         r"^#define\s+RS_BENCHMARK_SRAM_OFFSET\s+UINT32_C\((0x[0-9A-F]+)\)$",