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refactor: refactor APB4 and AXI4 references in RTL and test files
- Updated RTL style audit to reflect new APB4 naming conventions. - Changed performance log parsing to accommodate new APB4 wait signals. - Modified AXI4 interconnect and rib bus testbenches to use updated performance wait signals. - Adjusted IRQ topology testbench to use new APB4 peripheral and system IRQ widths. - Updated sysctrl testbench to reflect changes in APB4 performance wait signals. - Refined memory map tests to check for new APB4 definitions. - Enhanced performance log tests to validate new APB4 wait signal parsing. - Revised SOC topology tests to ensure correct APB4 peripheral and system bindings. - Updated user extensions tests to align with new APB4 interface naming.
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@@ -9,7 +9,7 @@ from scripts.parse_performance_log import parse_log
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def test_parse_log_requires_terminal_marker_and_complete_samples() -> None:
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report = parse_log(
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"PERF region=sdram op=read words=1024 checksum=0x1234 cycles=123 mgmt_wait=10 "
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"apb4_wait=9 sdram_wait=8 psram_wait=0 flash_wait=0 dma_wait=0\n"
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"apb4_periph_wait=9 sdram_wait=8 psram_wait=0 flash_wait=0 dma_wait=0\n"
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"PERF_BENCHMARK_PASS\n"
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)
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@@ -23,7 +23,7 @@ def test_parse_log_requires_terminal_marker_and_complete_samples() -> None:
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"dma_wait": 0,
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"flash_wait": 0,
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"mgmt_wait": 10,
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"apb4_wait": 9,
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"apb4_periph_wait": 9,
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"operation": "read",
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"psram_wait": 0,
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"region": "sdram",
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@@ -35,7 +35,7 @@ def test_parse_log_requires_terminal_marker_and_complete_samples() -> None:
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def test_parse_log_rejects_missing_benchmark_marker() -> None:
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report = parse_log(
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"PERF region=flash op=read words=1024 checksum=0 cycles=10 mgmt_wait=1 apb4_wait=1 "
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"PERF region=flash op=read words=1024 checksum=0 cycles=10 mgmt_wait=1 apb4_periph_wait=1 "
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"sdram_wait=0 psram_wait=0 flash_wait=1 dma_wait=0\n"
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)
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@@ -45,7 +45,7 @@ def test_parse_log_rejects_missing_benchmark_marker() -> None:
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def test_parse_log_rejects_report_with_performance_failure() -> None:
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report = parse_log(
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"PERF region=sdram op=read words=1024 checksum=0x1234 cycles=123 mgmt_wait=10 "
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"apb4_wait=9 sdram_wait=8 psram_wait=0 flash_wait=0 dma_wait=0\n"
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"apb4_periph_wait=9 sdram_wait=8 psram_wait=0 flash_wait=0 dma_wait=0\n"
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"PERF_FAIL region=sdram op=read reason=data expected=1234 actual=0\n"
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"PERF_BENCHMARK_PASS\n"
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)
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