feat: add Yosys synthesis scripts and update PDK paths

- Introduced common setup script for Yosys () to manage global variables and configurations.
- Added output filtering script () to enhance log readability.
- Created technology initialization script () for handling different PDKs.
- Developed main synthesis script () to orchestrate the synthesis flow using Yosys.
- Added a configuration makefile () for synthesis settings.
- Updated Yosys makefile () to integrate new scripts and configurations.
- Adjusted paths in  and RTL filelists to reflect new directory structure under .
- Modified various scripts and test files to accommodate the new PDK paths and ensure compatibility.
- Enhanced warning normalization in the analysis script to preserve PDK signatures.
This commit is contained in:
maksyuki committed 2026-08-14 18:51:02 +08:00
1 parent 319974f701
commit 7a7c0b2973
51 files changed
+132 -96

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@@ -118,8 +118,10 @@ def test_generate_all_is_stable_and_expands_paths(tmp_path: Path) -> None:
)
cluster = (tmp_path / "clusterip.fl").read_text(encoding="utf-8")
hazard3 = (tmp_path / "core_hazard3.fl").read_text(encoding="utf-8")
ihp130 = (tmp_path / "pdk_ihp130.fl").read_text(encoding="utf-8")
assert str(ROOT / "rtl/managed/clusterip") in cluster
assert str(ROOT / "rtl/managed/hazard3/hdl") in hazard3
assert str(ROOT / "physical/pdk/IHP-Open-PDK") in ihp130
assert "rtl/managed/mpw/core/username3" not in hazard3
assert (tmp_path / "core_hazard3.fl").is_file()
assert not (tmp_path / "core_picorv32.fl").exists()
@@ -147,7 +149,7 @@ def test_filelist_round_trips_verilog_define_values(tmp_path: Path) -> None:
def test_source_export_uses_the_fixed_hazard3_management_core(tmp_path: Path) -> None:
module_path = ROOT / "syn/tools/export_soc_sources.py"
module_path = ROOT / "physical/smoke/syn/tools/export_soc_sources.py"
spec = importlib.util.spec_from_file_location("retrosoc_source_export", module_path)
assert spec is not None and spec.loader is not None
source_export = importlib.util.module_from_spec(spec)
@@ -1305,6 +1307,22 @@ def test_warning_normalization_keeps_ranges_and_removes_variant_hash(tmp_path: P
)
def test_warning_normalization_preserves_pdk_signatures(tmp_path: Path) -> None:
message = (
f"{tmp_path}/physical/pdk/IHP-Open-PDK/ihp-sg13g2/"
"libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v:42: "
"Ignoring unsupported specify block"
)
normalized = normalize(tmp_path, "SPECIFYIGN", message)
assert normalized == (
"SPECIFYIGN:$ROOT/pdk/IHP-Open-PDK/ihp-sg13g2/"
"libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v:<line>: "
"Ignoring unsupported specify block"
)
def test_warning_normalization_maps_isolated_mpw_sources_to_managed_sources(
tmp_path: Path,
) -> None: