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https://github.com/retroSoC/retroSoC.git
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feat: add Yosys synthesis scripts and update PDK paths
- Introduced common setup script for Yosys () to manage global variables and configurations. - Added output filtering script () to enhance log readability. - Created technology initialization script () for handling different PDKs. - Developed main synthesis script () to orchestrate the synthesis flow using Yosys. - Added a configuration makefile () for synthesis settings. - Updated Yosys makefile () to integrate new scripts and configurations. - Adjusted paths in and RTL filelists to reflect new directory structure under . - Modified various scripts and test files to accommodate the new PDK paths and ensure compatibility. - Enhanced warning normalization in the analysis script to preserve PDK signatures.
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@@ -118,8 +118,10 @@ def test_generate_all_is_stable_and_expands_paths(tmp_path: Path) -> None:
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)
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cluster = (tmp_path / "clusterip.fl").read_text(encoding="utf-8")
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hazard3 = (tmp_path / "core_hazard3.fl").read_text(encoding="utf-8")
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ihp130 = (tmp_path / "pdk_ihp130.fl").read_text(encoding="utf-8")
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assert str(ROOT / "rtl/managed/clusterip") in cluster
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assert str(ROOT / "rtl/managed/hazard3/hdl") in hazard3
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assert str(ROOT / "physical/pdk/IHP-Open-PDK") in ihp130
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assert "rtl/managed/mpw/core/username3" not in hazard3
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assert (tmp_path / "core_hazard3.fl").is_file()
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assert not (tmp_path / "core_picorv32.fl").exists()
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@@ -147,7 +149,7 @@ def test_filelist_round_trips_verilog_define_values(tmp_path: Path) -> None:
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def test_source_export_uses_the_fixed_hazard3_management_core(tmp_path: Path) -> None:
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module_path = ROOT / "syn/tools/export_soc_sources.py"
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module_path = ROOT / "physical/smoke/syn/tools/export_soc_sources.py"
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spec = importlib.util.spec_from_file_location("retrosoc_source_export", module_path)
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assert spec is not None and spec.loader is not None
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source_export = importlib.util.module_from_spec(spec)
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@@ -1305,6 +1307,22 @@ def test_warning_normalization_keeps_ranges_and_removes_variant_hash(tmp_path: P
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)
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def test_warning_normalization_preserves_pdk_signatures(tmp_path: Path) -> None:
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message = (
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f"{tmp_path}/physical/pdk/IHP-Open-PDK/ihp-sg13g2/"
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"libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v:42: "
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"Ignoring unsupported specify block"
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)
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normalized = normalize(tmp_path, "SPECIFYIGN", message)
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assert normalized == (
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"SPECIFYIGN:$ROOT/pdk/IHP-Open-PDK/ihp-sg13g2/"
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"libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v:<line>: "
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"Ignoring unsupported specify block"
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)
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def test_warning_normalization_maps_isolated_mpw_sources_to_managed_sources(
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tmp_path: Path,
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) -> None:
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