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feat: chg the default fifo size of uart and spi

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maksyuki committed 2025-07-03 21:56:33 +08:00
1 parent 80340cf50d
commit 8105b6307c
1 file changed
+7 -7
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rtl/mini/top/ip_apb_wrapper.sv
+7 -7
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@@ -92,13 +92,13 @@ module ip_apb_wrapper (
i2c_if u_i2c_0_if ();
spi_if u_spi_0_if ();
apb4_archinfo u_apb4_archinfo_0(u_archinfo_0_apb4_if);
apb4_rng u_apb4_rng_0 (u_rng_0_apb4_if);
apb4_uart #(.FIFO_DEPTH(4)) u_apb4_uart_0 (u_uart_0_apb4_if, u_uart_0_if);
apb4_pwm u_apb4_pwm_0 (u_pwm_0_apb4_if, u_pwm_0_if);
apb4_ps2 u_apb4_ps2_0 (u_ps2_0_apb4_if, u_ps2_0_if);
apb4_i2c u_apb4_i2c_0 (u_i2c_0_apb4_if, u_i2c_0_if);
apb4_spi #(.FIFO_DEPTH(4)) u_apb4_spi_0 (u_qspi_0_apb4_if, u_spi_0_if);
apb4_archinfo u_apb4_archinfo_0(u_archinfo_0_apb4_if);
apb4_rng u_apb4_rng_0 (u_rng_0_apb4_if);
apb4_uart #(.FIFO_DEPTH(32)) u_apb4_uart_0 (u_uart_0_apb4_if, u_uart_0_if);
apb4_pwm u_apb4_pwm_0 (u_pwm_0_apb4_if, u_pwm_0_if);
apb4_ps2 u_apb4_ps2_0 (u_ps2_0_apb4_if, u_ps2_0_if);
apb4_i2c u_apb4_i2c_0 (u_i2c_0_apb4_if, u_i2c_0_if);
apb4_spi #(.FIFO_DEPTH(32)) u_apb4_spi_0 (u_qspi_0_apb4_if, u_spi_0_if);
// verilog_format: on
assign u_archinfo_0_apb4_if.paddr = s_m_apb_paddr;