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docs: add SOC architecture diagram and update related documentation

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- Introduced a new SOC functional architecture diagram in .
- Updated  to include instructions for the new SOC diagram, including layout and design specifications.
- Modified  to activate changes related to the SOC functional overview.
- Enhanced  to include new SOC architecture catalog references.
- Updated  to account for the new SOC architecture diagrams in coverage checks.
- Created  for validating SOC diagram specifications and ensuring compliance with design rules.
- Added tests in  to validate SOC diagram structure and integrity.
- Adjusted existing tests to reflect the addition of SOC architecture coverage.
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maksyuki committed 2026-09-17 20:06:40 +08:00
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commit 95ee570a44
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+4434 -115
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publications/README.md
+16
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@@ -48,6 +48,19 @@ memory, descriptor examples, address windows, linker/load placement and budgets.
Overview classification, access matrices, software flows, register bit layouts
and WaveDrom keep their existing rendering.
Section 2.1.1 adds a compact functional overview drawn independently with locked
CeTZ 0.5.2. It uses regular 9 pt text, individually named PRODUCT IP/instance
rows, external signal groups and explicit Gateway A/B fan-in. AXI32/AXI64
labels appear only in bus-spine and bridge symbols. Clock-domain backgrounds
are separate from IP categories. The original 45 Circuiteria figures retain
their rendering; the tracked inventory now totals 136 specialized figures.
`soc_diagram_reference.py` checks the new `datasheets/soc-architecture.json`
against PRODUCT IP coverage, selected RTL clock/interface bindings, gateway
clients, stream routes, pin groups and alternate-function mappings. Its CeTZ
renderer is `datasheets/soc-architecture.typ`. The new diagram is recorded under
Introduction without changing the 41-IP / 108-entry structure contract.
`diagram_reference.py` coordinates the circuit, binary, instruction and storage
adapters. The catalogs under `datasheets/diagram-*.json` record sources and
primary/shared chapter placement; `diagram-packages.typ` owns their appearance.
@@ -388,6 +401,9 @@ topology and pin-map tests cover the reused canonical validators. PDF checks
verify snapshot freshness, metadata, embedded fonts, bookmarks, navigable links,
minimum 9 pt text (8.5 pt only inside marked continuation notices), page-bound
text, per-IP starts and presence of every generated pad/window.
Quarter-turn labels use their rendered font-height axis: PDFMiner reports glyph
advance as `size` for rotated text, so the checker measures the rotated bounding
width instead. This corrects measurement without lowering the 9 pt threshold.
They complement manual inspection of diagram meaning, continued headers,
footnotes, page balance and grayscale readability.
publications/build_datasheet.py
+8 -2
View File
@@ -523,7 +523,13 @@ def validate_page_map(items: list[dict], index: list[dict]) -> None:
def validate_character_size(char: dict, number: int, regions: list[dict]) -> None:
"""Only continuation text inside a renderer-marked box may be below 9 pt."""
if not char["text"].strip() or char["size"] >= 8.95:
# PDFMiner's `size` becomes glyph advance for a quarter-turn label. Its
# rendered font-height axis is then the bounding-box width, not page height.
matrix = char.get("matrix", ())
quarter_turn = (len(matrix) == 6 and abs(matrix[0]) < 1e-8 and abs(matrix[3]) < 1e-8
and abs(matrix[1]) > 1e-8 and abs(matrix[2]) > 1e-8)
size = char["width"] if quarter_turn else char["size"]
if not char["text"].strip() or size >= 8.95:
return
continuation = any(
region["kind"] == "table-continuation"
@@ -535,7 +541,7 @@ def validate_character_size(char: dict, number: int, regions: list[dict]) -> Non
for region in regions
)
minimum = 8.5 if continuation else 9.0
if char["size"] < minimum - 0.05:
if size < minimum - 0.05:
raise ValueError(f"text smaller than {minimum:g} pt on page {number}")
publications/datasheets/chapter-review.md
+102 -102
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@@ -1,8 +1,8 @@
# Mini datasheet chapter review - 2026-09-17
Review snapshot: **v0.4 DRAFT**, 747 pages, IHP130 PRODUCT / 32 KiB SRAM.
Review snapshot: **v0.4 DRAFT**, 749 pages, IHP130 PRODUCT / 32 KiB SRAM.
Hardware commit: `2a497ecef0b084c02f77ddfb1e94fb0197e14b02`. PDF SHA-256: `f6ddf7f1a78e2de2ff2e3733d9b44149f2208dbf4361a5930322de37b3e9b30e`.
Hardware commit: `2a497ecef0b084c02f77ddfb1e94fb0197e14b02`. PDF SHA-256: `226acff7c8da0cecb194bbfd72bcf216f718359f5784156b3f2c092992ebbbdb`.
The table covers all **108 frozen entries / 41 IP chapters**. Page numbers belong to this exact PDF. "Already covered" describes the documented subset, not complete protocol compliance or qualification. Implementation, default enable/capability, available tests, executed passes and physical evidence remain separate.
@@ -18,103 +18,103 @@ Current CI includes failures; no per-IP pass report is promoted by this review.
| 6 / p. 9 | Reading this datasheet | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 7 / p. 55 | System Architecture | Nine AXI data masters, seven-bit global IDs, GA2D master 8 and JPEG 1R/1W admission. | Updated: topology, access matrix, ID and credit descriptions. | Source/document review; see the separate validation record for actually executed tests. [axi4_data_crossbar.sv](../../rtl/mini/top/axi4_data_crossbar.sv), [architecture.typ](../../publications/datasheets/sections/architecture.typ), [bus-programming.typ](../../publications/datasheets/sections/bus-programming.typ) | Attach contention and recovery measurements before throughput claims. |
| 8 / p. 55 | Introduction | Nine AXI data masters, seven-bit global IDs, GA2D master 8 and JPEG 1R/1W admission. | Updated: topology, access matrix, ID and credit descriptions. | Source/document review; see the separate validation record for actually executed tests. [axi4_data_crossbar.sv](../../rtl/mini/top/axi4_data_crossbar.sv), [architecture.typ](../../publications/datasheets/sections/architecture.typ), [bus-programming.typ](../../publications/datasheets/sections/bus-programming.typ) | Attach contention and recovery measurements before throughput claims. |
| 9 / p. 57 | Interconnect | Nine AXI data masters, seven-bit global IDs, GA2D master 8 and JPEG 1R/1W admission. | Updated: topology, access matrix, ID and credit descriptions. | Source/document review; see the separate validation record for actually executed tests. [axi4_data_crossbar.sv](../../rtl/mini/top/axi4_data_crossbar.sv), [architecture.typ](../../publications/datasheets/sections/architecture.typ), [bus-programming.typ](../../publications/datasheets/sections/bus-programming.typ) | Attach contention and recovery measurements before throughput claims. |
| 10 / p. 64 | Memory Attributes, Cache and DMA Coherency | Non-coherent data paths; software buffer ownership and maintenance are required. | Existing reference retained and GA2D ownership synchronized. | Source/document review; see the separate validation record for actually executed tests. [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Preserve clean/invalidate and ownership order in each platform integration. |
| 11 / p. 67 | Clock and Reset | Multiple clock domains, lifecycle gates and bridge drain/rearm paths; reference PLL disabled. | Existing reset/clock framework retained; current GA2D lifecycle included. | Source/document review; see the separate validation record for actually executed tests. [clock-programming.typ](../../publications/datasheets/sections/clock-programming.typ), [reset-summary.typ](../../publications/datasheets/sections/reset-summary.typ), [operating-states.typ](../../publications/datasheets/sections/operating-states.typ) | Qualify CDC/RDC, physical clocks and reset release on the selected implementation. |
| 12 / p. 74 | Interrupt System | 64 LP vector positions: two local and 62 external; GA2D vector 32 / external ordinal 30 / HP PLIC 11. | Updated: route spaces and CSR-enabled external IRQ registration/dispatch. | Source/document review; see the separate validation record for actually executed tests. [routing-reference.typ](../../publications/datasheets/sections/routing-reference.typ), [software_reference.py](../../publications/software_reference.py), [system-reference.json](../../publications/datasheets/system-reference.json) | Preserve vector/ordinal/PLIC distinctions; no-CSR runtime remains unsupported. |
| 13 / p. 76 | DMA Request, Interrupt and Event Routing | 64 LP vector positions: two local and 62 external; GA2D vector 32 / external ordinal 30 / HP PLIC 11. | Updated: route spaces and CSR-enabled external IRQ registration/dispatch. | Source/document review; see the separate validation record for actually executed tests. [routing-reference.typ](../../publications/datasheets/sections/routing-reference.typ), [software_reference.py](../../publications/software_reference.py), [system-reference.json](../../publications/datasheets/system-reference.json) | Preserve vector/ordinal/PLIC distinctions; no-CSR runtime remains unsupported. |
| 14 / p. 79 | Multicore Operation and Resource Ownership | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 15 / p. 81 | Peripheral Coexistence and Resource Conflicts | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 16 / p. 83 | Security and Access-Control Boundaries | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 17 / p. 84 | Debug, Diagnostics and Fault Recovery | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 18 / p. 86 | Register Access and Programming Conventions | Source-defined MMIO and bounded protocol subsets; external compliance is not established. | Reference already covered; current engine subset restrictions synchronized. | Source/document review; see the separate validation record for actually executed tests. [register-programming.typ](../../publications/datasheets/sections/register-programming.typ), [interface-subsets.typ](../../publications/datasheets/sections/interface-subsets.typ) | Retain width/strobe/error semantics and controller-specific limits. |
| 19 / p. 88 | Interface Standards and Supported Subsets | Source-defined MMIO and bounded protocol subsets; external compliance is not established. | Reference already covered; current engine subset restrictions synchronized. | Source/document review; see the separate validation record for actually executed tests. [register-programming.typ](../../publications/datasheets/sections/register-programming.typ), [interface-subsets.typ](../../publications/datasheets/sections/interface-subsets.typ) | Retain width/strobe/error semantics and controller-specific limits. |
| 20 / p. 91 | Peripherals | 41 PRODUCT/MPW IP chapters; instances may share register banks. | Updated: independent GA2D between JPEG and APU; other ownership preserved. | Source/document review; see the separate validation record for actually executed tests. [chapter-index.json](../../publications/datasheets/chapter-index.json), [structure-contract.json](../../publications/datasheets/structure-contract.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep stable register anchors and the reviewed 108-entry structure contract. |
| 21 / p. 91 | XPI Universal Controller (XPI) | Integrated: Four chip-select slots and 16 programmable LUT sequences. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [xpi.h](../../crt/include/retrosoc/hal/xpi.h), [xpi.md](../../docs/ip/xpi.md), [xpi.c](../../publications/examples/xpi.c) | Retain the documented subset and prerequisites. External SDR SPI/QSPI flash; board-specific LUT and timing. Attach a matching scoped report before qualification. |
| 22 / p. 111 | SPI SD Card Controller (SPISD) | Integrated: SD card SPI-mode command/data host. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [spisd.h](../../crt/include/retrosoc/hal/spisd.h), [spisd.md](../../docs/ip/spisd.md), [spisd.c](../../publications/examples/spisd.c) | Retain the documented subset and prerequisites. SPI-mode SD card; GPIO route and card supply. Attach a matching scoped report before qualification. |
| 23 / p. 131 | SD Card Controller (SDIO0) | Integrated: Native one-bit/four-bit SDR operation. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [sdio.h](../../crt/include/retrosoc/hal/sdio.h), [sdio.md](../../docs/ip/sdio.md), [sdio.c](../../publications/examples/sdio.c) | Retain the documented subset and prerequisites. SD card and shared GPIO route. Attach a matching scoped report before qualification. |
| 24 / p. 153 | On-Chip Memory (OCM / SRAM) | Integrated: 32 KiB in the reference profile, using eight 4 KiB banks. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [onchip_sram.h](../../crt/include/retrosoc/hal/onchip_sram.h), [onchip-sram.md](../../docs/ip/onchip-sram.md), [sram.c](../../publications/examples/sram.c) | Retain the documented subset and prerequisites. Selected technology SRAM macro; 32 KiB in the reference profile. Attach a matching scoped report before qualification. |
| 25 / p. 160 | PSRAM Controller (PSRAM) | Integrated: Four ESP-PSRAM64H devices addressable through a 32 MiB window. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [psram.h](../../crt/include/retrosoc/hal/psram.h), [psram.md](../../docs/ip/psram.md), [psram.c](../../publications/examples/psram.c) | Retain the documented subset and prerequisites. External QPI PSRAM; mutually exclusive with OPI on shared memory pads. Attach a matching scoped report before qualification. |
| 26 / p. 179 | OPI PSRAM / HyperBus-Style Controller | Partial: One octal DDR memory interface and one selected protocol profile. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [opipsram.h](../../crt/include/retrosoc/hal/opipsram.h), [opipsram.md](../../docs/ip/opipsram.md), [opipsram.c](../../publications/examples/opipsram.c) | Retain the documented subset and prerequisites. Compatible octal/HyperBus-style device; shared pads and board timing qualification. Attach a matching scoped report before qualification. |
| 27 / p. 197 | SDRAM Controller (SDRAM) | Integrated: Fixed 64 MiB, x16 SDR geometry with bank/row tracking. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [sdram.h](../../crt/include/retrosoc/hal/sdram.h), [sdram.md](../../docs/ip/sdram.md), [sdram.c](../../publications/examples/sdram.c) | Retain the documented subset and prerequisites. External x16 SDR SDRAM; initialization and refresh timings. Attach a matching scoped report before qualification. |
| 28 / p. 209 | General-Purpose Input Output (GPIO) | Integrated: 32 bidirectional GPIOs with administration and restricted user windows. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [gpio.h](../../crt/include/retrosoc/hal/gpio.h), [gpio.md](../../docs/ip/gpio.md), [gpio.c](../../publications/examples/gpio.c) | Retain the documented subset and prerequisites. Selected pad library and approved pin routing. Attach a matching scoped report before qualification. |
| 29 / p. 226 | Direct Memory Access (DMA) | Integrated: Eight channel contexts share a 32-bit AXI master. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [dma.h](../../crt/include/retrosoc/hal/dma.h), [dma.md](../../docs/ip/dma.md), [dma.c](../../publications/examples/dma.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 30 / p. 242 | General-Purpose Timer (TIM0, TIM1) | Integrated: Two 32-bit general-purpose timers. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [timer.h](../../crt/include/retrosoc/hal/timer.h), [timer.md](../../docs/ip/timer.md), [timer.c](../../publications/examples/timer.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 31 / p. 249 | Real-Time Clock (RTC) | Integrated: 64-bit seconds and 1/256-second subsecond time. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [rtc.h](../../crt/include/retrosoc/hal/rtc.h), [rtc.c](../../publications/examples/rtc.c), [datasheet.md](../../rtl/managed/clusterip/rtc/doc/datasheet.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 32 / p. 263 | Watchdog (WDG) | Integrated: Independent-clock window watchdog. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [datasheet.md](../../rtl/managed/clusterip/wdg/doc/datasheet.md), [wdg_pkg.sv](../../rtl/managed/clusterip/wdg/rtl/wdg_pkg.sv), [wdg_reg.sv](../../rtl/managed/clusterip/wdg/rtl/wdg_reg.sv) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 33 / p. 273 | Pulse Width Modulation (PWM) | Integrated: Two timers, four output channels and two operators. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [pwm.h](../../crt/include/retrosoc/hal/pwm.h), [pwm.c](../../publications/examples/pwm.c), [datasheet.md](../../rtl/managed/clusterip/pwm/doc/datasheet.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 34 / p. 298 | Management Console (UART0) | Integrated: 64-byte TX and RX FIFOs; fractional baud-rate generator. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [uart.h](../../crt/include/retrosoc/hal/uart.h), [uart.md](../../docs/ip/uart.md), [uart.c](../../publications/examples/uart.c) | Retain the documented subset and prerequisites. Management serial connection; optional DMA/flow-control routing. Attach a matching scoped report before qualification. |
| 35 / p. 311 | Application Console (UART1) | Integrated: 64-byte TX and RX FIFOs; fractional baud-rate generator. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [README.md](../../app/ports/linux/README.md), [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [uart.h](../../crt/include/retrosoc/hal/uart.h) | Retain the documented subset and prerequisites. Dedicated console TX/RX; no connected DMA or RTS/CTS. Attach a matching scoped report before qualification. |
| 36 / p. 313 | Inter-Integrated Circuit (I2C) | Integrated: Two controller instances with 7-bit and 10-bit addressing. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [i2c.h](../../crt/include/retrosoc/hal/i2c.h), [i2c.md](../../docs/ip/i2c.md), [i2c.c](../../publications/examples/i2c.c) | Retain the documented subset and prerequisites. External bus pull-ups and compatible target voltages. Attach a matching scoped report before qualification. |
| 37 / p. 327 | WS2812 LED Interface | Integrated: 24-bit GRB transmission on one GPIO alternate function. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [ws2812.h](../../crt/include/retrosoc/hal/ws2812.h), [ws2812.md](../../docs/ip/ws2812.md), [ws2812.c](../../publications/examples/ws2812.c) | Retain the documented subset and prerequisites. Compatible LED chain and approved level/supply interface. Attach a matching scoped report before qualification. |
| 38 / p. 336 | Personal System/2 (PS2) | Integrated: Bidirectional open-drain host interface. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [ps2.h](../../crt/include/retrosoc/hal/ps2.h), [ps2.c](../../publications/examples/ps2.c), [datasheet.md](../../rtl/managed/clusterip/ps2/doc/datasheet.md) | Retain the documented subset and prerequisites. Open-drain interface and board pull-ups. Attach a matching scoped report before qualification. |
| 39 / p. 346 | SDIO Controller (SDIO1) | Integrated: Native one-bit/four-bit SDR operation. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [sdio.h](../../crt/include/retrosoc/hal/sdio.h), [sdio.md](../../docs/ip/sdio.md), [sdio.c](../../publications/examples/sdio.c) | Retain the documented subset and prerequisites. SD card and dedicated pads; generic FPGA mapping pending. Attach a matching scoped report before qualification. |
| 40 / p. 350 | USB 2.0 Dual-Role Controller | Integrated: Dual-role digital controller with external 8-bit ULPI PHY. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [usb2.h](../../crt/include/retrosoc/hal/usb2.h), [usb2.md](../../docs/ip/usb2.md), [usb2.c](../../publications/examples/usb2.c) | Retain the documented subset and prerequisites. External ULPI PHY, 60 MHz interface clock, VBUS/role circuitry. Attach a matching scoped report before qualification. |
| 41 / p. 383 | Architecture Information (ARCHINFO) | Integrated: Read-only identity, configuration and topology discovery. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [archinfo.c](../../publications/examples/archinfo.c), [datasheet.md](../../rtl/managed/clusterip/archinfo/doc/datasheet.md), [archinfo_reg.sv](../../rtl/managed/clusterip/archinfo/rtl/archinfo_reg.sv) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 42 / p. 392 | System Controller (SYSCTRL) | Integrated: Root-managed configuration, HP lifecycle and clock requests. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [sysctrl.h](../../crt/include/retrosoc/hal/sysctrl.h), [sysctrl.md](../../docs/ip/sysctrl.md), [sysctrl.c](../../publications/examples/sysctrl.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 43 / p. 413 | Reset Clock Unit (RCU) | Integrated: AON-controlled requests and clock/reset policy. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [clock.h](../../crt/include/retrosoc/hal/clock.h), [pll-clock-control.md](../../docs/pll-clock-control.md), [rcu.c](../../publications/examples/rcu.c) | Retain the documented subset and prerequisites. Reference PLL disabled; any physical PLL/backend needs separate qualification. Attach a matching scoped report before qualification. |
| 44 / p. 415 | Management Local Interrupts (CLINT) | Integrated: Per-hart software interrupts and 64-bit timer compare. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [clint.h](../../crt/include/retrosoc/hal/clint.h), [clint.md](../../docs/ip/clint.md), [clint.c](../../publications/examples/clint.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 45 / p. 420 | HP Local Interrupt Controller (ACLINT) | Integrated: Two addressable hart slots; HP consumes slot 1. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [platform.c](../../app/ports/linux/opensbi/retrosoc_hp/platform.c), [clint.md](../../docs/ip/clint.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 46 / p. 424 | HP Platform-Level Interrupt Controller (PLIC) | Integrated: 32 source IDs, with source 0 reserved. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [platform.c](../../app/ports/linux/opensbi/retrosoc_hp/platform.c), [hp-platform.md](../../docs/ip/hp-platform.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 47 / p. 428 | LP/HP Mailbox | Integrated: Separate LP-to-HP and HP-to-LP payload banks. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [README.md](../../app/ports/linux/README.md), [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [hp_mailbox.h](../../crt/include/retrosoc/hal/hp_mailbox.h) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 48 / p. 436 | Resource Controller | Partial: Nine independently managed shared resources; resource 8 owns the active P5 GA2D direct 2D engine and IRQ route. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [resource.h](../../crt/include/retrosoc/hal/resource.h), [resource-controller.md](../../docs/ip/resource-controller.md), [resource.c](../../publications/examples/resource.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 49 / p. 443 | Fabric Monitor | Integrated: Nine master and six target observation banks; bank 8 observes active P5 GA2D direct 2D traffic. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [fabric_monitor.h](../../crt/include/retrosoc/hal/fabric_monitor.h), [fabric-monitor.md](../../docs/ip/fabric-monitor.md), [monitor.c](../../publications/examples/monitor.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 50 / p. 457 | Inter-Integrated Circuit Sound (I2S) | Integrated: Stereo master TX/RX with independent audio clock. | Base formats/clocks/FIFO reference retained; gated APU RX route and flush/reset cooperation added. | Tests available; 0 matching per-IP pass reports attached. [i2s.h](../../crt/include/retrosoc/hal/i2s.h), [i2s.md](../../docs/ip/i2s.md), [i2s.c](../../publications/examples/i2s.c) | Retain the documented subset and prerequisites. External audio clock and codec; stereo master operation. Attach a matching scoped report before qualification. |
| 51 / p. 466 | Digital Video Port (DVP) | Integrated: 8-bit parallel RGB565/YUV422 capture. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [dvp.h](../../crt/include/retrosoc/hal/dvp.h), [dvp.md](../../docs/ip/dvp.md), [dvp.c](../../publications/examples/dvp.c) | Retain the documented subset and prerequisites. Parallel camera, sensor configuration and pixel clock. Attach a matching scoped report before qualification. |
| 52 / p. 477 | JPEG Encoder / Decoder | Partial: 8-bit Baseline Sequential JPEG encode or decode. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [jpeg.h](../../crt/include/retrosoc/hal/jpeg.h), [jpeg.md](../../docs/ip/jpeg.md), [jpeg.c](../../publications/examples/jpeg.c) | Retain the documented subset and prerequisites. Native slot-6 payload admission has one normal read and one normal write credit at class 8; standalone codec behavior and end-to-end system qualification remain separate scopes. Attach a matching scoped report before qualification. |
| 53 / p. 501 | 2D Graphics Accelerator (GA2D) | Integrated: P5 direct single-job FILL, COPY, CONVERT, opaque alpha BLEND, A8 masks and exact background/destination in-place composition. | Added independent P5 chapter: operations, formats, rounding, bounds, cache ownership, lifecycle, diagrams, HAL and stable register links. | Tests available; 0 matching per-IP pass reports attached. [ga2d.md](../../docs/ip/ga2d.md), [apb4_ga2d.sv](../../rtl/ip/multimedia/apb4_ga2d.sv), [ga2d_core.sv](../../rtl/ip/multimedia/ga2d_core.sv) | Complete Phase 6 contention, sustained workloads and physical evidence before broader qualification; no queue/scaling/rotation/Linux graphics claim. |
| 54 / p. 521 | Audio Processing Unit (APU, partial) | Partial: Microcode-controlled WAV/FLAC decoding with private DMA, direct/ring submission, I2S TX and local storage. | Updated APUMC V2 4096-word capacity and checked-in WAV/FLAC image; retained 7 instruction classes / 62 opcodes / 128-byte job descriptor; clarified KWS and physical storage. | Tests available; 0 matching per-IP pass reports attached. [apu.h](../../crt/include/retrosoc/hal/apu.h), [apu.c](../../crt/src/hal/apu.c), [apu.md](../../docs/ip/apu.md) | Keep MP3 unsupported and PRODUCT EnableP7=0. Complete the specified codec/PCM/layer/concurrency/lifecycle corpus before advertising new capability. |
| 55 / p. 566 | Crypto Controller | Integrated: AES-128/192/256, SHA-224/256 and raw RSA-2048. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [crypto.h](../../crt/include/retrosoc/hal/crypto.h), [crypto.md](../../docs/ip/crypto.md), [crypto.c](../../publications/examples/crypto.c) | Retain the documented subset and prerequisites. LP-controlled buffers and key lifecycle; no secure key-store claim. Attach a matching scoped report before qualification. |
| 56 / p. 588 | Cyclic Redundancy Check (CRC) | Integrated: Programmable 7-, 8-, 16- or 32-bit CRC. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [crc.h](../../crt/include/retrosoc/hal/crc.h), [crc.c](../../publications/examples/crc.c), [datasheet.md](../../rtl/managed/clusterip/crc/doc/datasheet.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 57 / p. 595 | Random Number Generator (RNG) | Partial: Entropy-source qualification, FIFO and continuous health checks. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [rng.h](../../crt/include/retrosoc/hal/rng.h), [rng.c](../../publications/examples/rng.c), [datasheet.md](../../rtl/managed/clusterip/rng/doc/datasheet.md) | Retain the documented subset and prerequisites. Entropy-source qualification absent; deterministic integration source. Attach a matching scoped report before qualification. |
| 58 / p. 604 | Low-Bandwidth Extension (EXT-L) | Integrated: Fixed APB4 control and one interrupt. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [extension.h](../../crt/include/retrosoc/hal/extension.h), [extensions.md](../../docs/ip/extensions.md), [ext-l.c](../../publications/examples/ext-l.c) | Retain the documented subset and prerequisites. Fixed external APB target and lifecycle contract. Attach a matching scoped report before qualification. |
| 59 / p. 606 | High-Bandwidth Extension (EXT-H) | Integrated: Fixed EXT-H control, ownership, bounds and lifecycle. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [extension.h](../../crt/include/retrosoc/hal/extension.h), [extensions.md](../../docs/ip/extensions.md), [extensions.c](../../publications/examples/extensions.c) | Retain the documented subset and prerequisites. Bounded external AXI master and ACL configuration. Attach a matching scoped report before qualification. |
| 60 / p. 615 | Packaging | No matching characterized package, electrical, thermal or timing specification. | Document framework covered; numerical specifications remain incomplete and explicit. | Source/document review; see the separate validation record for actually executed tests. [pins.typ](../../publications/datasheets/sections/pins.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Supply package/board/corner/instrument evidence before publishing ratings. |
| 61 / p. 624 | Electrical and Timing Specifications | No matching characterized package, electrical, thermal or timing specification. | Document framework covered; numerical specifications remain incomplete and explicit. | Source/document review; see the separate validation record for actually executed tests. [pins.typ](../../publications/datasheets/sections/pins.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Supply package/board/corner/instrument evidence before publishing ratings. |
| 62 / p. 627 | Software | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 63 / p. 627 | Boot Configuration, Initialization and Recovery | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 64 / p. 634 | Programming, Image Maintenance and Service Procedures | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 65 / p. 636 | Runtime, SDK and Shell | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 66 / p. 644 | Applications | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 67 / p. 647 | Linux and Driver Status | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 68 / p. 649 | Software Support and Validated Configurations | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 69 / p. 653 | Implementation | Reproducible source and test flows exist; local execution and release qualification have separate scopes. | Existing integration and simulation guide retained. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [regress.py](../../scripts/regress.py), [engineering.md](../../docs/engineering.md) | Run the selected committed profile with required tools and archive machine-readable verdicts. |
| 70 / p. 653 | SoC Integration | Reproducible source and test flows exist; local execution and release qualification have separate scopes. | Existing integration and simulation guide retained. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [regress.py](../../scripts/regress.py), [engineering.md](../../docs/engineering.md) | Run the selected committed profile with required tools and archive machine-readable verdicts. |
| 71 / p. 654 | RTL Simulation | Reproducible source and test flows exist; local execution and release qualification have separate scopes. | Existing integration and simulation guide retained. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [regress.py](../../scripts/regress.py), [engineering.md](../../docs/engineering.md) | Run the selected committed profile with required tools and archive machine-readable verdicts. |
| 72 / p. 655 | FPGA Verification | Board constraints/integration inputs exist; complete board acceptance evidence is not attached. | Framework retained; missing board and route evidence remains explicit. | Source/document review; see the separate validation record for actually executed tests. [README.md](../../fpga/README.md), [software.typ](../../publications/datasheets/sections/software.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Provide approved pin routes, board revision and external-device acceptance logs. |
| 73 / p. 656 | Physical Design | Physical flow inputs exist; no matching synthesis/netlist/STA/signoff report is attached. | Framework retained; no new PPA or physical pass claim. | Source/document review; see the separate validation record for actually executed tests. [README.md](../../physical/README.md), [software.typ](../../publications/datasheets/sections/software.typ), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ) | Archive exact PDK/library/corner/constraints and complete physical reports. |
| 74 / p. 657 | PCB Hardware | Board constraints/integration inputs exist; complete board acceptance evidence is not attached. | Framework retained; missing board and route evidence remains explicit. | Source/document review; see the separate validation record for actually executed tests. [README.md](../../fpga/README.md), [software.typ](../../publications/datasheets/sections/software.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Provide approved pin routes, board revision and external-device acceptance logs. |
| 75 / p. 658 | Appendix: MPW Compatibility | Separate selectable MPW core/user-IP profile; not the fixed PRODUCT integration. | Existing compatibility appendix retained. | Source/document review; see the separate validation record for actually executed tests. [mini-mpw.mk](../../configs/cluster/mini-mpw.mk), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../rtl/mini/integration/README.md) | Keep MPW selection, reset and GPIO ownership separate from PRODUCT claims. |
| 76 / p. 658 | SoC Template | Separate selectable MPW core/user-IP profile; not the fixed PRODUCT integration. | Existing compatibility appendix retained. | Source/document review; see the separate validation record for actually executed tests. [mini-mpw.mk](../../configs/cluster/mini-mpw.mk), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../rtl/mini/integration/README.md) | Keep MPW selection, reset and GPIO ownership separate from PRODUCT claims. |
| 77 / p. 660 | MPW User Timer | MPW only: MPW-selectable timer and divider. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [user_ip.h](../../crt/include/retrosoc/hal/user_ip.h), [user-ip.md](../../docs/ip/user-ip.md), [mpw_timer.c](../../publications/examples/mpw_timer.c) | Retain the documented subset and prerequisites. MPW profile, selected user-IP manifest and pad ownership. Attach a matching scoped report before qualification. |
| 78 / p. 663 | MPW User GPIO | MPW only: MPW-selectable user GPIO data and enables. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [user_ip.h](../../crt/include/retrosoc/hal/user_ip.h), [user-ip.md](../../docs/ip/user-ip.md), [mpw_gpio.c](../../publications/examples/mpw_gpio.c) | Retain the documented subset and prerequisites. MPW profile, selected user-IP manifest and pad ownership. Attach a matching scoped report before qualification. |
| 79 / p. 666 | Appendix: Product Direction | Future family positioning and release milestones are not implemented product commitments. | Roadmap context retained; no new schedule or derivative claim. | Source/document review; see the separate validation record for actually executed tests. [soc-family-positioning.md](../../docs/soc-family-positioning.md), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Publish commitments only after a reviewed implementation and release decision. |
| 80 / p. 666 | Product Series | Future family positioning and release milestones are not implemented product commitments. | Roadmap context retained; no new schedule or derivative claim. | Source/document review; see the separate validation record for actually executed tests. [soc-family-positioning.md](../../docs/soc-family-positioning.md), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Publish commitments only after a reviewed implementation and release decision. |
| 81 / p. 667 | Roadmap | Future family positioning and release milestones are not implemented product commitments. | Roadmap context retained; no new schedule or derivative claim. | Source/document review; see the separate validation record for actually executed tests. [soc-family-positioning.md](../../docs/soc-family-positioning.md), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Publish commitments only after a reviewed implementation and release decision. |
| 82 / p. 668 | Technical Report | Mixed commit-bound CI: IHP130 behavioral pass, quality formatting failure with later tests skipped, SKY130 failure. | Updated: six workflow outcomes and explicit scope; per-IP reported-pass count remains zero. | Source/document review; see the separate validation record for actually executed tests. [system-reference.json](../../publications/datasheets/system-reference.json), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ), [dev_reference.py](../../publications/dev_reference.py) | Resolve failing prerequisites and attach scoped reports before broader qualification. |
| 83 / p. 668 | Release Verification Summary | Mixed commit-bound CI: IHP130 behavioral pass, quality formatting failure with later tests skipped, SKY130 failure. | Updated: six workflow outcomes and explicit scope; per-IP reported-pass count remains zero. | Source/document review; see the separate validation record for actually executed tests. [system-reference.json](../../publications/datasheets/system-reference.json), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ), [dev_reference.py](../../publications/dev_reference.py) | Resolve failing prerequisites and attach scoped reports before broader qualification. |
| 84 / p. 671 | Shuttle and Qualification Evidence | No matching silicon/shuttle/package characterization report supplied. | Evidence checklist covered; measured values/photos remain unavailable. | Source/document review; see the separate validation record for actually executed tests. [appendices.typ](../../publications/datasheets/sections/appendices.typ), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ) | Supply lot, die revision, package, setup and test conditions with each measurement. |
| 85 / p. 672 | Performance and Power Characterization | Benchmark counters and workload definitions exist; no matching product performance/power result. | Updated: GA2D work units, CPU cycles and engine snapshots; methods already covered. | Source/document review; see the separate validation record for actually executed tests. [performance-reference.typ](../../publications/datasheets/sections/performance-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Measure CPU/engine clocks, bytes/pixels/jobs, memory traffic and power under stated conditions. |
| 86 / p. 674 | Known Limitations and Revision Compatibility | Prototype maturity unchanged; MP3 trap, default-disabled KWS and workload/physical evidence gaps remain. | Updated limitations and revision compatibility; implementation presence is distinct from qualification. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Retire a limitation only with matching implementation and reviewed evidence. |
| 87 / p. 674 | Implementation and Qualification Limitations | Prototype maturity unchanged; MP3 trap, default-disabled KWS and workload/physical evidence gaps remain. | Updated limitations and revision compatibility; implementation presence is distinct from qualification. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Retire a limitation only with matching implementation and reviewed evidence. |
| 88 / p. 679 | Revision Identification and Compatibility | Prototype maturity unchanged; MP3 trap, default-disabled KWS and workload/physical evidence gaps remain. | Updated limitations and revision compatibility; implementation presence is distinct from qualification. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Retire a limitation only with matching implementation and reviewed evidence. |
| 89 / p. 680 | Appendix: Software Memory and Buffer Requirements | Static linker and worked-buffer accounting; examples are not measured peak runtime usage. | Existing memory accounting and examples retained. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [README.md](../../crt/README.md) | Measure stack, heap-free working sets and application buffers on the actual workload. |
| 90 / p. 680 | Linker Layout and Runtime Accounting | Static linker and worked-buffer accounting; examples are not measured peak runtime usage. | Existing memory accounting and examples retained. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [README.md](../../crt/README.md) | Measure stack, heap-free working sets and application buffers on the actual workload. |
| 91 / p. 681 | Worked Buffer Budgets | Static linker and worked-buffer accounting; examples are not measured peak runtime usage. | Existing memory accounting and examples retained. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [README.md](../../crt/README.md) | Measure stack, heap-free working sets and application buffers on the actual workload. |
| 92 / p. 683 | Appendix: Terminology, Notation and Document Map | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 93 / p. 683 | Terminology and Units | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 94 / p. 684 | Reading Numbers and Status | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 95 / p. 685 | Document and Evidence Navigation | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 96 / p. 686 | Appendix: Global Register and Address Index | Generated register/address inventory with stable per-register destinations. | Existing generator reused; current GA2D and APU definitions propagated. | Source/document review; see the separate validation record for actually executed tests. [register-index.typ](../../publications/datasheets/sections/register-index.typ), [register-annotations.json](../../publications/datasheets/register-annotations.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep C/RTL parity and source-derived anchors; do not hand-maintain duplicate register lists. |
| 97 / p. 686 | PRODUCT Register Instances | Generated register/address inventory with stable per-register destinations. | Existing generator reused; current GA2D and APU definitions propagated. | Source/document review; see the separate validation record for actually executed tests. [register-index.typ](../../publications/datasheets/sections/register-index.typ), [register-annotations.json](../../publications/datasheets/register-annotations.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep C/RTL parity and source-derived anchors; do not hand-maintain duplicate register lists. |
| 98 / p. 726 | MPW Conditional Register Instances | Generated register/address inventory with stable per-register destinations. | Existing generator reused; current GA2D and APU definitions propagated. | Source/document review; see the separate validation record for actually executed tests. [register-index.typ](../../publications/datasheets/sections/register-index.typ), [register-annotations.json](../../publications/datasheets/register-annotations.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep C/RTL parity and source-derived anchors; do not hand-maintain duplicate register lists. |
| 99 / p. 727 | Appendix: Fault and Status Code Reference | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 100 / p. 727 | Diagnostic Code Namespaces | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 101 / p. 733 | Status Registers and Capture Points | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 102 / p. 739 | Firmware Application Results | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 103 / p. 742 | Automated Completion and Simulator Verdicts | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 104 / p. 743 | Document Control | Publication v0.4 DRAFT bound to reviewed dev commit; publication edits may postdate hardware snapshot. | Updated: 2026-09-17 date, source closure, revision entry and 41-IP/108-entry evidence. | Source/document review; see the separate validation record for actually executed tests. [mini.json](../../publications/datasheets/mini.json), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../publications/README.md) | Ship matching manifest, PDF digest, review and validation records together. |
| 105 / p. 743 | Revision History | Publication v0.4 DRAFT bound to reviewed dev commit; publication edits may postdate hardware snapshot. | Updated: 2026-09-17 date, source closure, revision entry and 41-IP/108-entry evidence. | Source/document review; see the separate validation record for actually executed tests. [mini.json](../../publications/datasheets/mini.json), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../publications/README.md) | Ship matching manifest, PDF digest, review and validation records together. |
| 106 / p. 744 | Sources and Reproducibility | Publication v0.4 DRAFT bound to reviewed dev commit; publication edits may postdate hardware snapshot. | Updated: 2026-09-17 date, source closure, revision entry and 41-IP/108-entry evidence. | Source/document review; see the separate validation record for actually executed tests. [mini.json](../../publications/datasheets/mini.json), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../publications/README.md) | Ship matching manifest, PDF digest, review and validation records together. |
| 107 / p. 745 | License | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 108 / p. 746 | Document Status and Contact | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 9 / p. 59 | Interconnect | Nine AXI data masters, seven-bit global IDs, GA2D master 8 and JPEG 1R/1W admission. | Updated: topology, access matrix, ID and credit descriptions. | Source/document review; see the separate validation record for actually executed tests. [axi4_data_crossbar.sv](../../rtl/mini/top/axi4_data_crossbar.sv), [architecture.typ](../../publications/datasheets/sections/architecture.typ), [bus-programming.typ](../../publications/datasheets/sections/bus-programming.typ) | Attach contention and recovery measurements before throughput claims. |
| 10 / p. 66 | Memory Attributes, Cache and DMA Coherency | Non-coherent data paths; software buffer ownership and maintenance are required. | Existing reference retained and GA2D ownership synchronized. | Source/document review; see the separate validation record for actually executed tests. [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Preserve clean/invalidate and ownership order in each platform integration. |
| 11 / p. 69 | Clock and Reset | Multiple clock domains, lifecycle gates and bridge drain/rearm paths; reference PLL disabled. | Existing reset/clock framework retained; current GA2D lifecycle included. | Source/document review; see the separate validation record for actually executed tests. [clock-programming.typ](../../publications/datasheets/sections/clock-programming.typ), [reset-summary.typ](../../publications/datasheets/sections/reset-summary.typ), [operating-states.typ](../../publications/datasheets/sections/operating-states.typ) | Qualify CDC/RDC, physical clocks and reset release on the selected implementation. |
| 12 / p. 76 | Interrupt System | 64 LP vector positions: two local and 62 external; GA2D vector 32 / external ordinal 30 / HP PLIC 11. | Updated: route spaces and CSR-enabled external IRQ registration/dispatch. | Source/document review; see the separate validation record for actually executed tests. [routing-reference.typ](../../publications/datasheets/sections/routing-reference.typ), [software_reference.py](../../publications/software_reference.py), [system-reference.json](../../publications/datasheets/system-reference.json) | Preserve vector/ordinal/PLIC distinctions; no-CSR runtime remains unsupported. |
| 13 / p. 78 | DMA Request, Interrupt and Event Routing | 64 LP vector positions: two local and 62 external; GA2D vector 32 / external ordinal 30 / HP PLIC 11. | Updated: route spaces and CSR-enabled external IRQ registration/dispatch. | Source/document review; see the separate validation record for actually executed tests. [routing-reference.typ](../../publications/datasheets/sections/routing-reference.typ), [software_reference.py](../../publications/software_reference.py), [system-reference.json](../../publications/datasheets/system-reference.json) | Preserve vector/ordinal/PLIC distinctions; no-CSR runtime remains unsupported. |
| 14 / p. 81 | Multicore Operation and Resource Ownership | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 15 / p. 83 | Peripheral Coexistence and Resource Conflicts | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 16 / p. 85 | Security and Access-Control Boundaries | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 17 / p. 86 | Debug, Diagnostics and Fault Recovery | Nine shared resource slots and owner-routed faults/interrupts; access controls are not isolation certification. | Existing reference calibrated for GA2D, JPEG admission and APU gates. | Source/document review; see the separate validation record for actually executed tests. [system-management.typ](../../publications/datasheets/sections/system-management.typ), [coexistence-reference.typ](../../publications/datasheets/sections/coexistence-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Validate handoff, stop/drain and concurrent workloads with exact firmware/profile reports. |
| 18 / p. 88 | Register Access and Programming Conventions | Source-defined MMIO and bounded protocol subsets; external compliance is not established. | Reference already covered; current engine subset restrictions synchronized. | Source/document review; see the separate validation record for actually executed tests. [register-programming.typ](../../publications/datasheets/sections/register-programming.typ), [interface-subsets.typ](../../publications/datasheets/sections/interface-subsets.typ) | Retain width/strobe/error semantics and controller-specific limits. |
| 19 / p. 90 | Interface Standards and Supported Subsets | Source-defined MMIO and bounded protocol subsets; external compliance is not established. | Reference already covered; current engine subset restrictions synchronized. | Source/document review; see the separate validation record for actually executed tests. [register-programming.typ](../../publications/datasheets/sections/register-programming.typ), [interface-subsets.typ](../../publications/datasheets/sections/interface-subsets.typ) | Retain width/strobe/error semantics and controller-specific limits. |
| 20 / p. 93 | Peripherals | 41 PRODUCT/MPW IP chapters; instances may share register banks. | Updated: independent GA2D between JPEG and APU; other ownership preserved. | Source/document review; see the separate validation record for actually executed tests. [chapter-index.json](../../publications/datasheets/chapter-index.json), [structure-contract.json](../../publications/datasheets/structure-contract.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep stable register anchors and the reviewed 108-entry structure contract. |
| 21 / p. 93 | XPI Universal Controller (XPI) | Integrated: Four chip-select slots and 16 programmable LUT sequences. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [xpi.h](../../crt/include/retrosoc/hal/xpi.h), [xpi.md](../../docs/ip/xpi.md), [xpi.c](../../publications/examples/xpi.c) | Retain the documented subset and prerequisites. External SDR SPI/QSPI flash; board-specific LUT and timing. Attach a matching scoped report before qualification. |
| 22 / p. 113 | SPI SD Card Controller (SPISD) | Integrated: SD card SPI-mode command/data host. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [spisd.h](../../crt/include/retrosoc/hal/spisd.h), [spisd.md](../../docs/ip/spisd.md), [spisd.c](../../publications/examples/spisd.c) | Retain the documented subset and prerequisites. SPI-mode SD card; GPIO route and card supply. Attach a matching scoped report before qualification. |
| 23 / p. 133 | SD Card Controller (SDIO0) | Integrated: Native one-bit/four-bit SDR operation. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [sdio.h](../../crt/include/retrosoc/hal/sdio.h), [sdio.md](../../docs/ip/sdio.md), [sdio.c](../../publications/examples/sdio.c) | Retain the documented subset and prerequisites. SD card and shared GPIO route. Attach a matching scoped report before qualification. |
| 24 / p. 155 | On-Chip Memory (OCM / SRAM) | Integrated: 32 KiB in the reference profile, using eight 4 KiB banks. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [onchip_sram.h](../../crt/include/retrosoc/hal/onchip_sram.h), [onchip-sram.md](../../docs/ip/onchip-sram.md), [sram.c](../../publications/examples/sram.c) | Retain the documented subset and prerequisites. Selected technology SRAM macro; 32 KiB in the reference profile. Attach a matching scoped report before qualification. |
| 25 / p. 162 | PSRAM Controller (PSRAM) | Integrated: Four ESP-PSRAM64H devices addressable through a 32 MiB window. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [psram.h](../../crt/include/retrosoc/hal/psram.h), [psram.md](../../docs/ip/psram.md), [psram.c](../../publications/examples/psram.c) | Retain the documented subset and prerequisites. External QPI PSRAM; mutually exclusive with OPI on shared memory pads. Attach a matching scoped report before qualification. |
| 26 / p. 181 | OPI PSRAM / HyperBus-Style Controller | Partial: One octal DDR memory interface and one selected protocol profile. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [opipsram.h](../../crt/include/retrosoc/hal/opipsram.h), [opipsram.md](../../docs/ip/opipsram.md), [opipsram.c](../../publications/examples/opipsram.c) | Retain the documented subset and prerequisites. Compatible octal/HyperBus-style device; shared pads and board timing qualification. Attach a matching scoped report before qualification. |
| 27 / p. 199 | SDRAM Controller (SDRAM) | Integrated: Fixed 64 MiB, x16 SDR geometry with bank/row tracking. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [sdram.h](../../crt/include/retrosoc/hal/sdram.h), [sdram.md](../../docs/ip/sdram.md), [sdram.c](../../publications/examples/sdram.c) | Retain the documented subset and prerequisites. External x16 SDR SDRAM; initialization and refresh timings. Attach a matching scoped report before qualification. |
| 28 / p. 211 | General-Purpose Input Output (GPIO) | Integrated: 32 bidirectional GPIOs with administration and restricted user windows. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [gpio.h](../../crt/include/retrosoc/hal/gpio.h), [gpio.md](../../docs/ip/gpio.md), [gpio.c](../../publications/examples/gpio.c) | Retain the documented subset and prerequisites. Selected pad library and approved pin routing. Attach a matching scoped report before qualification. |
| 29 / p. 228 | Direct Memory Access (DMA) | Integrated: Eight channel contexts share a 32-bit AXI master. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [dma.h](../../crt/include/retrosoc/hal/dma.h), [dma.md](../../docs/ip/dma.md), [dma.c](../../publications/examples/dma.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 30 / p. 244 | General-Purpose Timer (TIM0, TIM1) | Integrated: Two 32-bit general-purpose timers. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [timer.h](../../crt/include/retrosoc/hal/timer.h), [timer.md](../../docs/ip/timer.md), [timer.c](../../publications/examples/timer.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 31 / p. 251 | Real-Time Clock (RTC) | Integrated: 64-bit seconds and 1/256-second subsecond time. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [rtc.h](../../crt/include/retrosoc/hal/rtc.h), [rtc.c](../../publications/examples/rtc.c), [datasheet.md](../../rtl/managed/clusterip/rtc/doc/datasheet.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 32 / p. 265 | Watchdog (WDG) | Integrated: Independent-clock window watchdog. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [datasheet.md](../../rtl/managed/clusterip/wdg/doc/datasheet.md), [wdg_pkg.sv](../../rtl/managed/clusterip/wdg/rtl/wdg_pkg.sv), [wdg_reg.sv](../../rtl/managed/clusterip/wdg/rtl/wdg_reg.sv) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 33 / p. 275 | Pulse Width Modulation (PWM) | Integrated: Two timers, four output channels and two operators. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [pwm.h](../../crt/include/retrosoc/hal/pwm.h), [pwm.c](../../publications/examples/pwm.c), [datasheet.md](../../rtl/managed/clusterip/pwm/doc/datasheet.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 34 / p. 300 | Management Console (UART0) | Integrated: 64-byte TX and RX FIFOs; fractional baud-rate generator. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [uart.h](../../crt/include/retrosoc/hal/uart.h), [uart.md](../../docs/ip/uart.md), [uart.c](../../publications/examples/uart.c) | Retain the documented subset and prerequisites. Management serial connection; optional DMA/flow-control routing. Attach a matching scoped report before qualification. |
| 35 / p. 313 | Application Console (UART1) | Integrated: 64-byte TX and RX FIFOs; fractional baud-rate generator. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [README.md](../../app/ports/linux/README.md), [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [uart.h](../../crt/include/retrosoc/hal/uart.h) | Retain the documented subset and prerequisites. Dedicated console TX/RX; no connected DMA or RTS/CTS. Attach a matching scoped report before qualification. |
| 36 / p. 315 | Inter-Integrated Circuit (I2C) | Integrated: Two controller instances with 7-bit and 10-bit addressing. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [i2c.h](../../crt/include/retrosoc/hal/i2c.h), [i2c.md](../../docs/ip/i2c.md), [i2c.c](../../publications/examples/i2c.c) | Retain the documented subset and prerequisites. External bus pull-ups and compatible target voltages. Attach a matching scoped report before qualification. |
| 37 / p. 329 | WS2812 LED Interface | Integrated: 24-bit GRB transmission on one GPIO alternate function. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [ws2812.h](../../crt/include/retrosoc/hal/ws2812.h), [ws2812.md](../../docs/ip/ws2812.md), [ws2812.c](../../publications/examples/ws2812.c) | Retain the documented subset and prerequisites. Compatible LED chain and approved level/supply interface. Attach a matching scoped report before qualification. |
| 38 / p. 338 | Personal System/2 (PS2) | Integrated: Bidirectional open-drain host interface. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [ps2.h](../../crt/include/retrosoc/hal/ps2.h), [ps2.c](../../publications/examples/ps2.c), [datasheet.md](../../rtl/managed/clusterip/ps2/doc/datasheet.md) | Retain the documented subset and prerequisites. Open-drain interface and board pull-ups. Attach a matching scoped report before qualification. |
| 39 / p. 348 | SDIO Controller (SDIO1) | Integrated: Native one-bit/four-bit SDR operation. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [sdio.h](../../crt/include/retrosoc/hal/sdio.h), [sdio.md](../../docs/ip/sdio.md), [sdio.c](../../publications/examples/sdio.c) | Retain the documented subset and prerequisites. SD card and dedicated pads; generic FPGA mapping pending. Attach a matching scoped report before qualification. |
| 40 / p. 352 | USB 2.0 Dual-Role Controller | Integrated: Dual-role digital controller with external 8-bit ULPI PHY. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [usb2.h](../../crt/include/retrosoc/hal/usb2.h), [usb2.md](../../docs/ip/usb2.md), [usb2.c](../../publications/examples/usb2.c) | Retain the documented subset and prerequisites. External ULPI PHY, 60 MHz interface clock, VBUS/role circuitry. Attach a matching scoped report before qualification. |
| 41 / p. 385 | Architecture Information (ARCHINFO) | Integrated: Read-only identity, configuration and topology discovery. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [archinfo.c](../../publications/examples/archinfo.c), [datasheet.md](../../rtl/managed/clusterip/archinfo/doc/datasheet.md), [archinfo_reg.sv](../../rtl/managed/clusterip/archinfo/rtl/archinfo_reg.sv) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 42 / p. 394 | System Controller (SYSCTRL) | Integrated: Root-managed configuration, HP lifecycle and clock requests. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [sysctrl.h](../../crt/include/retrosoc/hal/sysctrl.h), [sysctrl.md](../../docs/ip/sysctrl.md), [sysctrl.c](../../publications/examples/sysctrl.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 43 / p. 415 | Reset Clock Unit (RCU) | Integrated: AON-controlled requests and clock/reset policy. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [clock.h](../../crt/include/retrosoc/hal/clock.h), [pll-clock-control.md](../../docs/pll-clock-control.md), [rcu.c](../../publications/examples/rcu.c) | Retain the documented subset and prerequisites. Reference PLL disabled; any physical PLL/backend needs separate qualification. Attach a matching scoped report before qualification. |
| 44 / p. 417 | Management Local Interrupts (CLINT) | Integrated: Per-hart software interrupts and 64-bit timer compare. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [clint.h](../../crt/include/retrosoc/hal/clint.h), [clint.md](../../docs/ip/clint.md), [clint.c](../../publications/examples/clint.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 45 / p. 422 | HP Local Interrupt Controller (ACLINT) | Integrated: Two addressable hart slots; HP consumes slot 1. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [platform.c](../../app/ports/linux/opensbi/retrosoc_hp/platform.c), [clint.md](../../docs/ip/clint.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 46 / p. 426 | HP Platform-Level Interrupt Controller (PLIC) | Integrated: 32 source IDs, with source 0 reserved. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [platform.c](../../app/ports/linux/opensbi/retrosoc_hp/platform.c), [hp-platform.md](../../docs/ip/hp-platform.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 47 / p. 430 | LP/HP Mailbox | Integrated: Separate LP-to-HP and HP-to-LP payload banks. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [README.md](../../app/ports/linux/README.md), [retrosoc_hp.dts](../../app/ports/linux/linux/retrosoc_hp.dts), [hp_mailbox.h](../../crt/include/retrosoc/hal/hp_mailbox.h) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 48 / p. 438 | Resource Controller | Partial: Nine independently managed shared resources; resource 8 owns the active P5 GA2D direct 2D engine and IRQ route. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [resource.h](../../crt/include/retrosoc/hal/resource.h), [resource-controller.md](../../docs/ip/resource-controller.md), [resource.c](../../publications/examples/resource.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 49 / p. 445 | Fabric Monitor | Integrated: Nine master and six target observation banks; bank 8 observes active P5 GA2D direct 2D traffic. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [fabric_monitor.h](../../crt/include/retrosoc/hal/fabric_monitor.h), [fabric-monitor.md](../../docs/ip/fabric-monitor.md), [monitor.c](../../publications/examples/monitor.c) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 50 / p. 459 | Inter-Integrated Circuit Sound (I2S) | Integrated: Stereo master TX/RX with independent audio clock. | Base formats/clocks/FIFO reference retained; gated APU RX route and flush/reset cooperation added. | Tests available; 0 matching per-IP pass reports attached. [i2s.h](../../crt/include/retrosoc/hal/i2s.h), [i2s.md](../../docs/ip/i2s.md), [i2s.c](../../publications/examples/i2s.c) | Retain the documented subset and prerequisites. External audio clock and codec; stereo master operation. Attach a matching scoped report before qualification. |
| 51 / p. 468 | Digital Video Port (DVP) | Integrated: 8-bit parallel RGB565/YUV422 capture. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [dvp.h](../../crt/include/retrosoc/hal/dvp.h), [dvp.md](../../docs/ip/dvp.md), [dvp.c](../../publications/examples/dvp.c) | Retain the documented subset and prerequisites. Parallel camera, sensor configuration and pixel clock. Attach a matching scoped report before qualification. |
| 52 / p. 479 | JPEG Encoder / Decoder | Partial: 8-bit Baseline Sequential JPEG encode or decode. | Updated: current implementation details and generated register fields; existing reference structure retained. | Tests available; 0 matching per-IP pass reports attached. [jpeg.h](../../crt/include/retrosoc/hal/jpeg.h), [jpeg.md](../../docs/ip/jpeg.md), [jpeg.c](../../publications/examples/jpeg.c) | Retain the documented subset and prerequisites. Native slot-6 payload admission has one normal read and one normal write credit at class 8; standalone codec behavior and end-to-end system qualification remain separate scopes. Attach a matching scoped report before qualification. |
| 53 / p. 503 | 2D Graphics Accelerator (GA2D) | Integrated: P5 direct single-job FILL, COPY, CONVERT, opaque alpha BLEND, A8 masks and exact background/destination in-place composition. | Added independent P5 chapter: operations, formats, rounding, bounds, cache ownership, lifecycle, diagrams, HAL and stable register links. | Tests available; 0 matching per-IP pass reports attached. [ga2d.md](../../docs/ip/ga2d.md), [apb4_ga2d.sv](../../rtl/ip/multimedia/apb4_ga2d.sv), [ga2d_core.sv](../../rtl/ip/multimedia/ga2d_core.sv) | Complete Phase 6 contention, sustained workloads and physical evidence before broader qualification; no queue/scaling/rotation/Linux graphics claim. |
| 54 / p. 523 | Audio Processing Unit (APU, partial) | Partial: Microcode-controlled WAV/FLAC decoding with private DMA, direct/ring submission, I2S TX and local storage. | Updated APUMC V2 4096-word capacity and checked-in WAV/FLAC image; retained 7 instruction classes / 62 opcodes / 128-byte job descriptor; clarified KWS and physical storage. | Tests available; 0 matching per-IP pass reports attached. [apu.h](../../crt/include/retrosoc/hal/apu.h), [apu.c](../../crt/src/hal/apu.c), [apu.md](../../docs/ip/apu.md) | Keep MP3 unsupported and PRODUCT EnableP7=0. Complete the specified codec/PCM/layer/concurrency/lifecycle corpus before advertising new capability. |
| 55 / p. 568 | Crypto Controller | Integrated: AES-128/192/256, SHA-224/256 and raw RSA-2048. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Tests available; 0 matching per-IP pass reports attached. [crypto.h](../../crt/include/retrosoc/hal/crypto.h), [crypto.md](../../docs/ip/crypto.md), [crypto.c](../../publications/examples/crypto.c) | Retain the documented subset and prerequisites. LP-controlled buffers and key lifecycle; no secure key-store claim. Attach a matching scoped report before qualification. |
| 56 / p. 590 | Cyclic Redundancy Check (CRC) | Integrated: Programmable 7-, 8-, 16- or 32-bit CRC. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [crc.h](../../crt/include/retrosoc/hal/crc.h), [crc.c](../../publications/examples/crc.c), [datasheet.md](../../rtl/managed/clusterip/crc/doc/datasheet.md) | Retain the documented subset and prerequisites. No additional off-chip component implied; use the selected clock/reset and access policy. Attach a matching scoped report before qualification. |
| 57 / p. 597 | Random Number Generator (RNG) | Partial: Entropy-source qualification, FIFO and continuous health checks. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [rng.h](../../crt/include/retrosoc/hal/rng.h), [rng.c](../../publications/examples/rng.c), [datasheet.md](../../rtl/managed/clusterip/rng/doc/datasheet.md) | Retain the documented subset and prerequisites. Entropy-source qualification absent; deterministic integration source. Attach a matching scoped report before qualification. |
| 58 / p. 606 | Low-Bandwidth Extension (EXT-L) | Integrated: Fixed APB4 control and one interrupt. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [extension.h](../../crt/include/retrosoc/hal/extension.h), [extensions.md](../../docs/ip/extensions.md), [ext-l.c](../../publications/examples/ext-l.c) | Retain the documented subset and prerequisites. Fixed external APB target and lifecycle contract. Attach a matching scoped report before qualification. |
| 59 / p. 608 | High-Bandwidth Extension (EXT-H) | Integrated: Fixed EXT-H control, ownership, bounds and lifecycle. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [extension.h](../../crt/include/retrosoc/hal/extension.h), [extensions.md](../../docs/ip/extensions.md), [extensions.c](../../publications/examples/extensions.c) | Retain the documented subset and prerequisites. Bounded external AXI master and ACL configuration. Attach a matching scoped report before qualification. |
| 60 / p. 617 | Packaging | No matching characterized package, electrical, thermal or timing specification. | Document framework covered; numerical specifications remain incomplete and explicit. | Source/document review; see the separate validation record for actually executed tests. [pins.typ](../../publications/datasheets/sections/pins.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Supply package/board/corner/instrument evidence before publishing ratings. |
| 61 / p. 626 | Electrical and Timing Specifications | No matching characterized package, electrical, thermal or timing specification. | Document framework covered; numerical specifications remain incomplete and explicit. | Source/document review; see the separate validation record for actually executed tests. [pins.typ](../../publications/datasheets/sections/pins.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Supply package/board/corner/instrument evidence before publishing ratings. |
| 62 / p. 629 | Software | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 63 / p. 629 | Boot Configuration, Initialization and Recovery | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 64 / p. 636 | Programming, Image Maintenance and Service Procedures | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 65 / p. 638 | Runtime, SDK and Shell | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 66 / p. 646 | Applications | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 67 / p. 649 | Linux and Driver Status | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 68 / p. 651 | Software Support and Validated Configurations | Runtime/HAL and conditional Linux bringup exist; no general GA2D Linux graphics driver. CSR and profile conditions apply. | Existing startup, ownership, bundle and diagnostics reference retained; IRQ, GA2D/APU support and benchmark semantics refreshed. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [software-runtime.typ](../../publications/datasheets/sections/software-runtime.typ), [software_reference.py](../../publications/software_reference.py) | Attach exact firmware/boot/device reports; do not infer integrated pass from syntax or host tests. |
| 69 / p. 655 | Implementation | Reproducible source and test flows exist; local execution and release qualification have separate scopes. | Existing integration and simulation guide retained. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [regress.py](../../scripts/regress.py), [engineering.md](../../docs/engineering.md) | Run the selected committed profile with required tools and archive machine-readable verdicts. |
| 70 / p. 655 | SoC Integration | Reproducible source and test flows exist; local execution and release qualification have separate scopes. | Existing integration and simulation guide retained. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [regress.py](../../scripts/regress.py), [engineering.md](../../docs/engineering.md) | Run the selected committed profile with required tools and archive machine-readable verdicts. |
| 71 / p. 656 | RTL Simulation | Reproducible source and test flows exist; local execution and release qualification have separate scopes. | Existing integration and simulation guide retained. | Source/document review; see the separate validation record for actually executed tests. [software.typ](../../publications/datasheets/sections/software.typ), [regress.py](../../scripts/regress.py), [engineering.md](../../docs/engineering.md) | Run the selected committed profile with required tools and archive machine-readable verdicts. |
| 72 / p. 657 | FPGA Verification | Board constraints/integration inputs exist; complete board acceptance evidence is not attached. | Framework retained; missing board and route evidence remains explicit. | Source/document review; see the separate validation record for actually executed tests. [README.md](../../fpga/README.md), [software.typ](../../publications/datasheets/sections/software.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Provide approved pin routes, board revision and external-device acceptance logs. |
| 73 / p. 658 | Physical Design | Physical flow inputs exist; no matching synthesis/netlist/STA/signoff report is attached. | Framework retained; no new PPA or physical pass claim. | Source/document review; see the separate validation record for actually executed tests. [README.md](../../physical/README.md), [software.typ](../../publications/datasheets/sections/software.typ), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ) | Archive exact PDK/library/corner/constraints and complete physical reports. |
| 74 / p. 659 | PCB Hardware | Board constraints/integration inputs exist; complete board acceptance evidence is not attached. | Framework retained; missing board and route evidence remains explicit. | Source/document review; see the separate validation record for actually executed tests. [README.md](../../fpga/README.md), [software.typ](../../publications/datasheets/sections/software.typ), [electrical-reference.typ](../../publications/datasheets/sections/electrical-reference.typ) | Provide approved pin routes, board revision and external-device acceptance logs. |
| 75 / p. 660 | Appendix: MPW Compatibility | Separate selectable MPW core/user-IP profile; not the fixed PRODUCT integration. | Existing compatibility appendix retained. | Source/document review; see the separate validation record for actually executed tests. [mini-mpw.mk](../../configs/cluster/mini-mpw.mk), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../rtl/mini/integration/README.md) | Keep MPW selection, reset and GPIO ownership separate from PRODUCT claims. |
| 76 / p. 660 | SoC Template | Separate selectable MPW core/user-IP profile; not the fixed PRODUCT integration. | Existing compatibility appendix retained. | Source/document review; see the separate validation record for actually executed tests. [mini-mpw.mk](../../configs/cluster/mini-mpw.mk), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../rtl/mini/integration/README.md) | Keep MPW selection, reset and GPIO ownership separate from PRODUCT claims. |
| 77 / p. 662 | MPW User Timer | MPW only: MPW-selectable timer and divider. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [user_ip.h](../../crt/include/retrosoc/hal/user_ip.h), [user-ip.md](../../docs/ip/user-ip.md), [mpw_timer.c](../../publications/examples/mpw_timer.c) | Retain the documented subset and prerequisites. MPW profile, selected user-IP manifest and pad ownership. Attach a matching scoped report before qualification. |
| 78 / p. 665 | MPW User GPIO | MPW only: MPW-selectable user GPIO data and enables. | Already covered: function, protocol, registers and software; retained and regenerated from current sources. | Source reviewed; 0 matching per-IP pass reports attached. [user_ip.h](../../crt/include/retrosoc/hal/user_ip.h), [user-ip.md](../../docs/ip/user-ip.md), [mpw_gpio.c](../../publications/examples/mpw_gpio.c) | Retain the documented subset and prerequisites. MPW profile, selected user-IP manifest and pad ownership. Attach a matching scoped report before qualification. |
| 79 / p. 668 | Appendix: Product Direction | Future family positioning and release milestones are not implemented product commitments. | Roadmap context retained; no new schedule or derivative claim. | Source/document review; see the separate validation record for actually executed tests. [soc-family-positioning.md](../../docs/soc-family-positioning.md), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Publish commitments only after a reviewed implementation and release decision. |
| 80 / p. 668 | Product Series | Future family positioning and release milestones are not implemented product commitments. | Roadmap context retained; no new schedule or derivative claim. | Source/document review; see the separate validation record for actually executed tests. [soc-family-positioning.md](../../docs/soc-family-positioning.md), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Publish commitments only after a reviewed implementation and release decision. |
| 81 / p. 669 | Roadmap | Future family positioning and release milestones are not implemented product commitments. | Roadmap context retained; no new schedule or derivative claim. | Source/document review; see the separate validation record for actually executed tests. [soc-family-positioning.md](../../docs/soc-family-positioning.md), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Publish commitments only after a reviewed implementation and release decision. |
| 82 / p. 670 | Technical Report | Mixed commit-bound CI: IHP130 behavioral pass, quality formatting failure with later tests skipped, SKY130 failure. | Updated: six workflow outcomes and explicit scope; per-IP reported-pass count remains zero. | Source/document review; see the separate validation record for actually executed tests. [system-reference.json](../../publications/datasheets/system-reference.json), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ), [dev_reference.py](../../publications/dev_reference.py) | Resolve failing prerequisites and attach scoped reports before broader qualification. |
| 83 / p. 670 | Release Verification Summary | Mixed commit-bound CI: IHP130 behavioral pass, quality formatting failure with later tests skipped, SKY130 failure. | Updated: six workflow outcomes and explicit scope; per-IP reported-pass count remains zero. | Source/document review; see the separate validation record for actually executed tests. [system-reference.json](../../publications/datasheets/system-reference.json), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ), [dev_reference.py](../../publications/dev_reference.py) | Resolve failing prerequisites and attach scoped reports before broader qualification. |
| 84 / p. 673 | Shuttle and Qualification Evidence | No matching silicon/shuttle/package characterization report supplied. | Evidence checklist covered; measured values/photos remain unavailable. | Source/document review; see the separate validation record for actually executed tests. [appendices.typ](../../publications/datasheets/sections/appendices.typ), [release-verification.typ](../../publications/datasheets/sections/release-verification.typ) | Supply lot, die revision, package, setup and test conditions with each measurement. |
| 85 / p. 674 | Performance and Power Characterization | Benchmark counters and workload definitions exist; no matching product performance/power result. | Updated: GA2D work units, CPU cycles and engine snapshots; methods already covered. | Source/document review; see the separate validation record for actually executed tests. [performance-reference.typ](../../publications/datasheets/sections/performance-reference.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Measure CPU/engine clocks, bytes/pixels/jobs, memory traffic and power under stated conditions. |
| 86 / p. 676 | Known Limitations and Revision Compatibility | Prototype maturity unchanged; MP3 trap, default-disabled KWS and workload/physical evidence gaps remain. | Updated limitations and revision compatibility; implementation presence is distinct from qualification. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Retire a limitation only with matching implementation and reviewed evidence. |
| 87 / p. 676 | Implementation and Qualification Limitations | Prototype maturity unchanged; MP3 trap, default-disabled KWS and workload/physical evidence gaps remain. | Updated limitations and revision compatibility; implementation presence is distinct from qualification. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Retire a limitation only with matching implementation and reviewed evidence. |
| 88 / p. 681 | Revision Identification and Compatibility | Prototype maturity unchanged; MP3 trap, default-disabled KWS and workload/physical evidence gaps remain. | Updated limitations and revision compatibility; implementation presence is distinct from qualification. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [system-reference.json](../../publications/datasheets/system-reference.json) | Retire a limitation only with matching implementation and reviewed evidence. |
| 89 / p. 682 | Appendix: Software Memory and Buffer Requirements | Static linker and worked-buffer accounting; examples are not measured peak runtime usage. | Existing memory accounting and examples retained. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [README.md](../../crt/README.md) | Measure stack, heap-free working sets and application buffers on the actual workload. |
| 90 / p. 682 | Linker Layout and Runtime Accounting | Static linker and worked-buffer accounting; examples are not measured peak runtime usage. | Existing memory accounting and examples retained. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [README.md](../../crt/README.md) | Measure stack, heap-free working sets and application buffers on the actual workload. |
| 91 / p. 683 | Worked Buffer Budgets | Static linker and worked-buffer accounting; examples are not measured peak runtime usage. | Existing memory accounting and examples retained. | Source/document review; see the separate validation record for actually executed tests. [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [memory-use.typ](../../publications/datasheets/sections/memory-use.typ), [README.md](../../crt/README.md) | Measure stack, heap-free working sets and application buffers on the actual workload. |
| 92 / p. 685 | Appendix: Terminology, Notation and Document Map | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 93 / p. 685 | Terminology and Units | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 94 / p. 686 | Reading Numbers and Status | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 95 / p. 687 | Document and Evidence Navigation | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 96 / p. 688 | Appendix: Global Register and Address Index | Generated register/address inventory with stable per-register destinations. | Existing generator reused; current GA2D and APU definitions propagated. | Source/document review; see the separate validation record for actually executed tests. [register-index.typ](../../publications/datasheets/sections/register-index.typ), [register-annotations.json](../../publications/datasheets/register-annotations.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep C/RTL parity and source-derived anchors; do not hand-maintain duplicate register lists. |
| 97 / p. 688 | PRODUCT Register Instances | Generated register/address inventory with stable per-register destinations. | Existing generator reused; current GA2D and APU definitions propagated. | Source/document review; see the separate validation record for actually executed tests. [register-index.typ](../../publications/datasheets/sections/register-index.typ), [register-annotations.json](../../publications/datasheets/register-annotations.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep C/RTL parity and source-derived anchors; do not hand-maintain duplicate register lists. |
| 98 / p. 728 | MPW Conditional Register Instances | Generated register/address inventory with stable per-register destinations. | Existing generator reused; current GA2D and APU definitions propagated. | Source/document review; see the separate validation record for actually executed tests. [register-index.typ](../../publications/datasheets/sections/register-index.typ), [register-annotations.json](../../publications/datasheets/register-annotations.json), [ip-catalog.json](../../publications/datasheets/ip-catalog.json) | Keep C/RTL parity and source-derived anchors; do not hand-maintain duplicate register lists. |
| 99 / p. 729 | Appendix: Fault and Status Code Reference | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 100 / p. 729 | Diagnostic Code Namespaces | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 101 / p. 735 | Status Registers and Capture Points | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 102 / p. 741 | Firmware Application Results | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 103 / p. 744 | Automated Completion and Simulator Verdicts | Source-defined diagnostic namespaces, application returns and sticky TEST_STATUS verdicts. | Existing reference retained and generated current-source records reused. | Source/document review; see the separate validation record for actually executed tests. [fault-reference.typ](../../publications/datasheets/sections/fault-reference.typ), [application-diagnostics.typ](../../publications/datasheets/sections/application-diagnostics.typ), [engineering.md](../../docs/engineering.md) | Distinguish software returns from hardware completion and log presence from test pass. |
| 104 / p. 745 | Document Control | Publication v0.4 DRAFT bound to reviewed dev commit; publication edits may postdate hardware snapshot. | Updated: 2026-09-17 date, source closure, revision entry and 41-IP/108-entry evidence. | Source/document review; see the separate validation record for actually executed tests. [mini.json](../../publications/datasheets/mini.json), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../publications/README.md) | Ship matching manifest, PDF digest, review and validation records together. |
| 105 / p. 745 | Revision History | Publication v0.4 DRAFT bound to reviewed dev commit; publication edits may postdate hardware snapshot. | Updated: 2026-09-17 date, source closure, revision entry and 41-IP/108-entry evidence. | Source/document review; see the separate validation record for actually executed tests. [mini.json](../../publications/datasheets/mini.json), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../publications/README.md) | Ship matching manifest, PDF digest, review and validation records together. |
| 106 / p. 746 | Sources and Reproducibility | Publication v0.4 DRAFT bound to reviewed dev commit; publication edits may postdate hardware snapshot. | Updated: 2026-09-17 date, source closure, revision entry and 41-IP/108-entry evidence. | Source/document review; see the separate validation record for actually executed tests. [mini.json](../../publications/datasheets/mini.json), [appendices.typ](../../publications/datasheets/sections/appendices.typ), [README.md](../../publications/README.md) | Ship matching manifest, PDF digest, review and validation records together. |
| 107 / p. 747 | License | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
| 108 / p. 748 | Document Status and Contact | Document conventions, navigation and provenance; not an additional hardware capability. | Existing reference complete for its declared scope; retained. | Source/document review; see the separate validation record for actually executed tests. [reading.typ](../../publications/datasheets/sections/reading.typ), [usage-appendices.typ](../../publications/datasheets/sections/usage-appendices.typ), [appendices.typ](../../publications/datasheets/sections/appendices.typ) | Preserve clear DRAFT/status language, source links and third-party license ownership. |
publications/datasheets/sections/architecture.typ
+3
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@@ -2,6 +2,7 @@
#import "../figures.typ": *
#import "../waveforms.typ": timing
#import "../diagram-packages.typ": memory-window-diagram
#import "../soc-architecture.typ": soc-functional-diagram
= System Architecture
#change-start("dev-architecture","Nine-master fabric, address map, LP IRQ and lifecycle reference")
@@ -11,6 +12,8 @@ Mini PRODUCT contains two fixed harts, an LP-owned control plane, a native HP da
two APB4 register islands. There is no hardware cache coherency. Software transfers shared
buffer ownership explicitly and performs the required fences and cache maintenance.
#figure(soc-functional-diagram(), caption:[Mini PRODUCT functional architecture and clock domains.])<soc-functional-overview>
=== Management Processor
==== Hazard3
Hazard3 is hart 0 and the root-management processor. The reference profile selects RV32IM
publications/datasheets/soc-architecture.json
+3852
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publications/datasheets/soc-architecture.typ
+100
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@@ -0,0 +1,100 @@
#import "@preview/cetz:0.5.2" as cetz
#import "style.typ": data, ink, gold, muted, rhythm, change-start, change-end
#let point(x,y) = (x,-y)
#let regular(body) = text(font:"Inter",size:9pt,weight:"regular",fill:ink,body)
#let endpoint(n,side,p) = {
if side=="north" {(n.x+n.w*p,n.y)}
else if side=="south" {(n.x+n.w*p,n.y+n.h)}
else if side=="west" {(n.x,n.y+n.h*p)}
else {(n.x+n.w,n.y+n.h*p)}
}
#let diagram-position(kind) = context {
let p=here().position()
metadata((kind:kind,package:"cetz",id:"soc-functional",page:p.page,x:p.x.pt(),y:p.y.pt()))
}
#let soc-functional-diagram() = block(width:100%,breakable:false)[
#change-start("soc-functional","Compact PRODUCT functional architecture",category:"added")
#diagram-position("publication-diagram")
#let spec=data.system_reference.illustrations.soc_architecture.at("soc-functional")
#set text(font:"Inter",size:9pt,weight:"regular",fill:ink)
#cetz.canvas(length:1mm,{
import cetz.draw: rect, line, content, circle
let fill-for(domain) = {
let d=spec.domains.find(d=>d.id==domain)
if d==none {white} else {rgb(d.fill)}
}
// Text is explicitly regular inside every content block, including cells.
let label(x,y,w,h,body,rotate:false,align-left:false) = {
content(point(x+w/2,y+h/2),block(width:(if rotate {h} else {w})*1mm - 2pt,above:0pt,below:0pt)[
#set text(font:"Inter",size:9pt,weight:"regular",fill:ink)
#set par(leading:2pt,spacing:0pt)
#align(if align-left {left} else {center},regular(body))
],angle:if rotate {90deg} else {0deg})
}
for r in spec.regions {
rect(point(r.x,r.y),point(r.x+r.w,r.y+r.h),fill:fill-for(r.domain),stroke:none)
if r.label {
let title=spec.domains.find(d=>d.id==r.domain).label
let p=r.at("label_position",default:(r.x+1,r.y+0.5))
content(point(..p),regular(title),anchor:"north-west")
}
}
// Draw paths first; their endpoints stop at the declared symbol boundaries.
for e in spec.edges {
let a=spec.nodes.find(n=>n.id==e.from)
let b=spec.nodes.find(n=>n.id==e.to)
let start=endpoint(a,e.source_side,e.source_position)
let end=endpoint(b,e.target_side,e.target_position)
let route=(start,)
for p in e.via {
route.push(p.enumerate().map(((axis,v))=>if v=="source" {start.at(axis)} else if v=="target" {end.at(axis)} else {v}))
}
route.push(end)
let points=()
for p in route {if points.len()==0 or points.last()!=point(..p) {points.push(point(..p))}}
let stroke=(paint:if e.kind=="stream" {muted} else {ink},thickness:0.65pt,
dash:if e.kind=="control" {"dashed"} else {"solid"})
line(..points,stroke:stroke,mark:if e.kind=="stream" and e.at("duplex",default:false) {(start:">",end:">")} else if e.arrow {(end:">")} else {none})
}
for n in spec.nodes {
if n.role=="rail" {
line(point(n.x,n.y),point(n.x,n.y+n.h),stroke:0.65pt+ink)
} else if n.role=="io" {
label(n.x,n.y,n.w,n.h,n.label,align-left:n.x>150)
} else {
let base=if n.role=="bus" {rgb("#D5D6D8")} else if n.domain in ("audio","dvp") {fill-for(n.domain)} else {white}
if n.role=="gateway" {
line(point(n.x,n.y),point(n.x+n.w,n.y+4),point(n.x+n.w,n.y+n.h - 4),point(n.x,n.y+n.h),close:true,
fill:white,stroke:0.6pt+gold)
} else {
rect(point(n.x,n.y),point(n.x+n.w,n.y+n.h),fill:base,
stroke:0.6pt+if n.role=="bridge" {gold} else {ink})
}
let l=0;let r=0
for part in n.at("parts",default:()) {
let left-side=part.at("side",default:"right")=="left"
let x=if left-side {n.x+l} else {n.x+n.w - r - part.width}
rect(point(x,n.y),point(x+part.width,n.y+n.h),fill:if part.domain!=n.domain {fill-for(part.domain)} else {white},stroke:0.6pt+ink)
label(x,n.y,part.width,n.h,part.label)
if left-side {l+=part.width} else {r+=part.width}
}
label(n.x+l,n.y,n.w - l - r,n.h,n.label,rotate:n.rotate)
}
}
})
#block(above:4pt,below:0pt,width:100%)[
#set align(left)
#set par(leading:rhythm.small-leading,spacing:2pt)
#set text(font:"Inter",size:9pt,weight:"regular")
#grid(columns:(1fr,1fr,1fr,1fr,1fr),row-gutter:1pt,
..spec.domains.map(d=>[#box(width:2.5mm,height:2.5mm,fill:rgb(d.fill),stroke:0.35pt+muted) #d.label]))
#v(2pt)
GW = HP I/O gateway. Grey arrows: streams; other arrows: requests.
#linebreak()
PCLK derives from LP. \* = GPIO AF; QPI/OPI pads use one mode. Crossings do not join.
]
#diagram-position("publication-diagram-end")
#change-end("soc-functional")
]
publications/datasheets/style.md
+73 -3
View File
@@ -710,9 +710,9 @@ Do not fill electrical, thermal, power or throughput fields with borrowed device
figures, target clocks or analytic ceilings.
The dev refresh used the `dev-` namespace plus navigation/revision and GA2D
chapter markers. The current closing-page edit activates only `closing-page`;
earlier markers do not make unchanged chapters appear rewritten. Footer-total
changes remain distinct from the newly appended unnumbered page in the report.
chapter markers. The current functional-overview edit activates `soc-functional`
and the three navigation directories. Earlier changes, including the closing
page, must not be relabeled as new content; pagination remains a separate change.
Use the existing Overview icon artwork, including its reverted outline style.
The five Multimedia entries use two rows of three and two cells within the same
@@ -889,6 +889,76 @@ actual SVG as well as color and grayscale PDF renders.
## Header, footer, assets and maintenance
### Compact PRODUCT functional architecture
Insert the new `cetz:soc-functional` figure after the Section 2.1.1 introduction.
It is a single portrait vector diagram within the 172 mm body width; keep its
caption and diagram together and allow normal pagination if the current page is
too short. Use locked CeTZ 0.5.2 directly. This component does not replace or
restyle existing Circuiteria/IP, interconnect, clock, Overview or matrix figures.
Every diagram label is Inter Regular, weight 400, at least 9 pt, including bus
and bridge labels, clock-domain labels, external signals and notes. Do not use
bold or semibold to create hierarchy. Use compact rows, thin 0.6 pt symbol
borders, 0.65 pt routes, pale domain backgrounds and the existing ink/gold
palette. Rotate long bus-spine and narrow bridge labels by 90 degrees where
needed; keep ordinary module and external-interface labels horizontal. Check
the actual embedded PDF font weight and rendered font size, not just the Typst
settings. A quarter-turn glyph's page-height extent measures its advance, so
the font-size check uses its rendered width for this orientation; the minimum
font size remains 9 pt.
CPU and memory blocks occupy the top tier, independent initiators and gateways
the middle, and narrow APB peripheral rows the lower tier. Name UART0/1,
I2C0/1, TIM0/1 and SDIO0/1 individually. Cover every PRODUCT IP; the separate
MPW IPs remain in their appendix. Show DMA subcells only for implementations
with the corresponding private path, and keep the central eight-channel DMA
independent of Gateway A/B. Avoid summary boxes that collapse several unrelated
peripherals or a large Reference panel that displaces functional content.
AXI32/AXI64 text is permitted only in bus-spine and bridge symbols. It must not
reappear in CPU/IP titles or as floating wire labels. Identify AHB-Lite to AXI,
MMIO gating/downsizing, ingress CDC/upsizing and four independent memory-target
CDC/downsizing paths in their bridge symbols. APB4 and stream paths stay distinct.
Gateway A visibly receives separate APU, SDIO0 and USB2 inputs; Gateway B receives
separate SDIO1 and SPI-SD inputs. Each has one output to its own CDC/width bridge
and then the HP fabric. The two outputs are not merged into one fabricated bus.
Use the following functional clock-domain fills, with printed names or a compact
key. Multi-clock peripherals have distinct control/FIFO and timing/link views.
| Domain | Fill |
| --- | --- |
| AON | `#ECEDEF` |
| LP | `#F4EFE4` |
| HP | `#E7EFF6` |
| PCLK | `#EBF2E8` |
| MEM | `#EEE9F4` |
| JTAG | `#E7F2F0` |
| AUDIO | `#F7E9E9` |
| DVP | `#F8EFD9` |
| ULPI | `#E8ECF7` |
Both APB4 register islands are PCLK functions. SRAM and Fabric Monitor execute
in HP; the external-memory controllers execute in MEM. PCLK derives from LP,
so different fills do not imply all domain pairs are asynchronous. These are
functional clock regions, not power islands or timing-signoff statements.
Place concise external signal groups outside the module rows. Bind them to the
pin map, interface declarations or actual GPIO alternate-function routes.
Mark GPIO alternate functions, QPI/OPI shared-pad selection and the external
ULPI PHY accurately; interface arrows do not promise concurrent use of conflicting
routes. Solid request paths and grey stream paths remain visually distinct;
responses and remote register-control CDC detail may be omitted from this overview
and retained in the detailed references. Crossings without junctions are not joins.
The catalog records semantic node roles, clock sources, gateway inputs/output,
literal interface widths, stream connections, source files and external pin
groups. Validate those against current sources and include them in the manifest.
Record the new CeTZ category in the 108-entry coverage report and require the
actual render. Its addition raises the specialized inventory from 135 to 136;
the original 45 Circuiteria figures remain unchanged.
### Independent closing page
Append one unnumbered closing page after Document Status and Contact. It is an
publications/datasheets/style.typ
+2 -2
View File
@@ -66,8 +66,8 @@
}
#let minor-title(body) = block(above:rhythm.minor-before,below:rhythm.minor-after,sticky:true,strong(body))
// This edit appends one closing page; earlier body-edit markers remain inactive.
#let current-change(id) = id == "closing-page"
// This edit adds the functional overview and updates its navigation references.
#let current-change(id) = id in ("soc-functional","contents","table-directory","figure-directory")
#let change-start(id, title, category:"modified") = context {
if current-change(id) {metadata((
kind:"publication-change-start",id:id,title:title,category:category,page:here().page()))}
publications/datasheets/system-reference.json
+7 -1
View File
@@ -5941,6 +5941,9 @@
"rtl/managed/mpw/ip/username1/user_ip_design.sv",
"rtl/managed/mpw/ip/username2/user_ip_design.sv",
"rtl/mini/address_map/memory_map.json",
"rtl/mini/integration/clock_reset_domains.json",
"rtl/mini/integration/soc_topology.json",
"rtl/mini/pin_map/pin_map.json",
"rtl/mini/top/apb4_periph.sv",
"rtl/mini/top/apb4_system.sv",
"rtl/mini/top/axi4_bus.sv",
@@ -5952,6 +5955,8 @@
"rtl/mini/top/extension_subsystem.sv",
"rtl/mini/top/fabric_monitor.sv",
"rtl/mini/top/hp_subsystem.sv",
"rtl/mini/top/memory_pad_mux.sv",
"rtl/mini/top/mgmt_debug_wrapper.sv",
"rtl/mini/top/onchip_ram.sv",
"rtl/mini/top/rcu.sv",
"rtl/mini/top/resource_controller.sv",
@@ -7145,7 +7150,8 @@
},
"circuit_catalog": "publications/datasheets/diagram-circuits.json",
"layout_catalog": "publications/datasheets/diagram-layouts.json",
"storage_catalog": "publications/datasheets/diagram-storage.json"
"storage_catalog": "publications/datasheets/diagram-storage.json",
"soc_architecture_catalog": "publications/datasheets/soc-architecture.json"
},
"ci_snapshot": {
"revision": "2a497ecef0b084c02f77ddfb1e94fb0197e14b02",
publications/diagram_coverage.py
+7 -2
View File
@@ -1,11 +1,13 @@
"""Chapter coverage and actual renderer-use checks for specialized publication figures."""
from __future__ import annotations
PACKAGES = ("circuiteria", "bytefield", "rivet", "blockcell")
PACKAGES = ("circuiteria", "bytefield", "rivet", "blockcell", "cetz")
def inventory(diagrams: dict) -> dict[str, dict]:
result = {}
for identifier, record in diagrams.get("soc_architecture", {}).items():
result["cetz:" + identifier] = {"package": "cetz", "id": identifier, "sources": sorted(record["sources"])}
for package, values in (("circuiteria", diagrams["circuits"]), ("bytefield", diagrams["layouts"]),
("blockcell", diagrams["storage"])):
for identifier, record in values.items():
@@ -31,13 +33,15 @@ def coverage(contract: dict, diagrams: dict) -> list[dict]:
ip_ids = set(contract["ip_ids"])
chapters = {}
for identifier in ip_ids:
chapters[identifier] = {"circuiteria": ["circuiteria:" + identifier], "bytefield": [], "rivet": [], "blockcell": []}
chapters[identifier] = {package: [] for package in PACKAGES}
chapters[identifier]["circuiteria"] = ["circuiteria:" + identifier]
for package, values in (("bytefield", diagrams["layouts"]), ("blockcell", diagrams["storage"])):
for identifier, record in values.items():
for chapter in record["chapters"]:
chapters.setdefault(chapter, {key: [] for key in PACKAGES})[package].append(package + ":" + identifier)
chapters["apu"]["rivet"] = [key for key in items if key.startswith("rivet:")]
direct = {
"Introduction": ["cetz:soc-functional"] if diagrams.get("soc_architecture") else [],
"Typical Applications and System Configurations": ["circuiteria:system-media"],
"Interconnect": ["circuiteria:system-fabric", "blockcell:product-memory-windows"],
"Memory Attributes, Cache and DMA Coherency": ["blockcell:cache-boundaries"],
@@ -51,6 +55,7 @@ def coverage(contract: dict, diagrams: dict) -> list[dict]:
"Linker Layout and Runtime Accounting": chapters["software-runtime"]["blockcell"],
}
reasons = {
"cetz": "No additional chip-level functional overview is owned by this section.",
"circuiteria": "No separate hardware-port connection diagram is required here; existing workflows, matrices or lookup tables retain their own rendering.",
"bytefield": "No additional binary frame/container layout is owned by this section; existing MMIO register bit layouts remain with the register renderer.",
"rivet": "No APU internal instruction encoding is defined here; CPU ISA/CSR manuals remain outside this publication's scope.",
publications/diagram_reference.py
+5 -1
View File
@@ -14,10 +14,13 @@ from publications.circuit_reference import validate_instance_connections
from publications.instruction_reference import instruction_families
from publications.format_reference import collect_layouts
from publications.storage_reference import collect_storage
from publications.soc_diagram_reference import collect_soc_diagram
def dependencies(spec: dict) -> set[str]:
paths = set(spec.get("sources", []))
if spec.get("soc_architecture_catalog"):
paths.add(spec["soc_architecture_catalog"])
for binding in spec.get("bindings", []):
paths.add(binding["file"])
for circuit in spec.get("circuits", {}).values():
@@ -229,4 +232,5 @@ def collect_diagrams(root: Path, spec: dict, regions: list[dict], system: dict)
"sdio_command": copy.deepcopy(spec["sdio_command"]), "apu": apu_formats(root),
"uart_fifo": uart_fifo(root), "windows": sorted(windows, key=lambda r: r["base"]),
"cache": {"granule": 64, "offset": 16, "length": 64, "end": 80, "covered_bytes": 128},
"circuits": circuits, "layouts": layouts, "storage": storage}
"circuits": circuits, "layouts": layouts, "storage": storage,
"soc_architecture": collect_soc_diagram(root, spec["soc_architecture_catalog"], regions) if spec.get("soc_architecture_catalog") else {}}
publications/soc_diagram_reference.py
+160
View File
@@ -0,0 +1,160 @@
"""Source checks for the compact, regular-weight PRODUCT functional overview."""
from __future__ import annotations
import copy
import json
import re
from pathlib import Path
from publications.circuit_reference import instance_ports
from publications.waveform_reference import uncomment
TOP = "rtl/mini/top/retrosoc.sv"
PLANE = "rtl/mini/top/soc_data_plane.sv"
PERIPH = "rtl/mini/top/apb4_periph.sv"
SYSTEM = "rtl/mini/top/apb4_system.sv"
CLOCKS = "rtl/mini/integration/clock_reset_domains.json"
TOPOLOGY = "rtl/mini/integration/soc_topology.json"
PINS = "rtl/mini/pin_map/pin_map.json"
def bound_clock(root: Path, binding: dict, domains: dict) -> str:
ports = instance_ports(root, binding)
if ports.get(binding["port"]) != {binding["signal"]}:
raise ValueError("SoC diagram clock connection changed")
for name, domain in domains.items():
if binding["file"] == domain["path"] and binding["signal"] == domain["clock"]:
return name
aliases = {
TOP: {"clk_lp_i": "lp", "clk_hp_i": "hp", "clk_hp_core_i": "hp", "clk_pclk_i": "pclk", "clk_mem_i": "memory", "clk_aud_i": "audio"},
PLANE: {"clk_hp_i": "hp", "clk_io_i": "pclk", "clk_lp_i": "lp", "clk_mem_i": "memory"},
PERIPH: {"clk_i": "pclk", "clk_mem_i": "memory", "clk_aud_i": "audio", "clk_ulpi_i": "usb2_ulpi"},
SYSTEM: {"clk_i": "pclk", "clk_aud_i": "audio"},
}
domain = aliases.get(binding["file"], {}).get(binding["signal"])
if domain is None:
raise ValueError("SoC diagram has an unreviewed clock alias")
return domain
def interface_parameter(root: Path, source: dict, parameter: str) -> int:
text = uncomment((root / source["file"]).read_text(encoding="utf-8"))
matches = re.findall(r"axi4_if\s*#\(([^;]+?)\)\s*" + re.escape(source["name"]) + r"(?:\s*\[[^\]]+\])*\s*\(", text, re.S)
if len(matches) != 1:
raise ValueError("SoC diagram interface declaration changed")
values = re.findall(r"\." + re.escape(parameter) + r"\s*\(\s*(\d+)\s*\)", matches[0])
if len(values) != 1:
raise ValueError("SoC diagram requires a literal interface width")
return int(values[0])
def validate_soc_diagram(root: Path, diagram: dict) -> None:
if diagram["font_size_pt"] != 9 or diagram["font_weight"] != 400:
raise ValueError("SoC diagram requires regular 9 pt text")
sources = set(diagram["sources"])
for source in sources:
path = root / source
if not path.is_file() or not path.resolve().is_relative_to(root.resolve()):
raise ValueError("SoC diagram source missing or outside repository")
if not {TOP, PLANE, PERIPH, SYSTEM, CLOCKS, TOPOLOGY, PINS} <= sources:
raise ValueError("SoC diagram source inventory incomplete")
clocks = json.loads((root / CLOCKS).read_text(encoding="utf-8"))
domains = {row["name"]: row for row in clocks["domains"]}
if {row["id"] for row in diagram["domains"]} != domains.keys():
raise ValueError("SoC diagram domain inventory changed")
topology = json.loads((root / TOPOLOGY).read_text(encoding="utf-8"))
expected_masters = [{"index": row["index"], "name": row["name"]} for row in topology["data_master_policies"]]
if diagram["masters"] != expected_masters:
raise ValueError("SoC diagram master map changed")
if diagram["pclk_parent"] != "lp" or not any(row["name"] == "lp_pclk_generated_clock" and row["relationship"] == "synchronous_generated_clock" for row in clocks["same_domain_contracts"]):
raise ValueError("SoC diagram LP/PCLK relationship changed")
for module, name, port, signal in [("apb4_periph", "u_apb4_periph", "clk_i", "clk_pclk_i"),
("apb4_system", "u_apb4_system", "clk_i", "clk_pclk_i"),
("soc_data_plane", "u_data_plane", "clk_io_i", "clk_pclk_i")]:
if instance_ports(root, {"file": TOP, "module": module, "name": name}).get(port) != {signal}:
raise ValueError("SoC diagram parent clock connection changed")
nodes = {}
coverage = set()
for node in diagram["nodes"]:
if node["id"] in nodes:
raise ValueError("duplicate SoC diagram node")
nodes[node["id"]] = node
coverage.update(node.get("ips", []))
if re.search(r"AXI(?:32|64)", node["label"]) and node["role"] not in {"bus", "bridge"}:
raise ValueError("SoC diagram width label outside bus or bridge")
if node.get("clock"):
if node["clock"]["file"] not in sources or bound_clock(root, node["clock"], domains) != node["domain"]:
raise ValueError("SoC diagram node clock domain contradicts RTL")
elif node["role"] not in {"bus", "bridge", "io", "rail"}:
raise ValueError("SoC diagram module lacks clock evidence")
for part in node.get("parts", []):
if part["domain"] != node["domain"] and (not part.get("clock") or bound_clock(root, part["clock"], domains) != part["domain"]):
raise ValueError("SoC diagram clock-domain subcell lacks evidence")
index = json.loads((root / "publications/datasheets/chapter-index.json").read_text(encoding="utf-8"))
expected_ips = {row["id"] for row in index if not row["id"].startswith("mpw-")}
if coverage != expected_ips:
raise ValueError("SoC diagram PRODUCT IP coverage incomplete")
instances = {"uart0", "uart1", "i2c0", "i2c1", "tim0", "tim1", "sdio0", "sdio1"}
if not instances <= nodes.keys():
raise ValueError("SoC diagram collapsed independently required instances")
edges = diagram["edges"]
for edge in edges:
if edge["from"] not in nodes or edge["to"] not in nodes:
raise ValueError("SoC diagram edge lacks endpoint")
if re.search(r"AXI(?:32|64)", edge.get("label", "")):
raise ValueError("SoC diagram repeated a width label on a wire")
for gateway in diagram["gateways"]:
ports = instance_ports(root, gateway["instance"])
if any(ports.get(port) != {member["signal"]} for port, member in gateway["members"].items()):
raise ValueError("SoC diagram gateway membership contradicts RTL")
inputs = [edge["from"] for edge in edges if edge["to"] == gateway["id"] and edge["kind"] == "data"]
outputs = [edge["to"] for edge in edges if edge["from"] == gateway["id"] and edge["kind"] == "data"]
expected = [member["node"] for member in gateway["members"].values()]
if sorted(inputs) != sorted(expected) or outputs != [gateway["bridge"]]:
raise ValueError("SoC diagram gateway must have separate inputs and one output")
if not any(edge["from"] == gateway["bridge"] and edge["to"] == "hp_bus" for edge in edges):
raise ValueError("SoC diagram gateway output does not reach the HP fabric")
for bridge in diagram["bridges"]:
ports = instance_ports(root, bridge["instance"])
if any(ports.get(port) != {signal} for port, signal in bridge["ports"].items()):
raise ValueError("SoC diagram bridge source connection changed")
for side, binding in bridge.get("widths", {}).items():
if interface_parameter(root, binding, "DATA_WIDTH") != bridge[side]:
raise ValueError("SoC diagram bridge width contradicts RTL")
label = re.sub(r"\s+", "", nodes[bridge["node"]]["label"])
expected = (f"AXI{bridge['input_bits']}→APB4" if bridge.get("output_protocol") == "APB4"
else f"AXI{bridge['input_bits']}→AXI{bridge['output_bits']}" if bridge["input_bits"] != bridge["output_bits"]
else f"AXI{bridge['input_bits']}")
if expected not in label:
raise ValueError("SoC diagram printed bridge width contradicts its source")
for bus in diagram["bus_widths"]:
width = interface_parameter(root, bus["interface"], "DATA_WIDTH")
if width != bus["bits"] or re.findall(r"AXI(32|64)", nodes[bus["node"]]["label"]) != [str(width)]:
raise ValueError("SoC diagram bus width label changed")
for stream in diagram["stream_bindings"]:
ports = instance_ports(root, stream["instance"])
if any(ports.get(port) != {signal} for port, signal in stream["ports"].items()):
raise ValueError("SoC diagram stream connection changed")
for interface in diagram["interfaces"]:
if interface["source"] not in sources or interface["node"] not in nodes:
raise ValueError("SoC diagram interface source missing")
text = (root / interface["source"]).read_text(encoding="utf-8")
if not interface["tokens"] or any(token not in text for token in interface["tokens"]):
raise ValueError("SoC diagram external signal source changed")
if interface.get("af_prefix") and interface["af_prefix"] not in json.dumps(topology["gpio_alt_functions"]):
raise ValueError("SoC diagram GPIO alternate-function route missing")
if interface.get("pin_bus"):
pin_map = json.loads((root / PINS).read_text(encoding="utf-8"))
bus = interface["pin_bus"]
if not any(row.get("prefix") == bus["prefix"] and row.get("count") == bus["count"] for row in pin_map["pads"]):
raise ValueError("SoC diagram external pin-group width changed")
def collect_soc_diagram(root: Path, catalog: str, regions: list[dict]) -> dict:
diagram = json.loads((root / catalog).read_text(encoding="utf-8"))
validate_soc_diagram(root, diagram)
result = copy.deepcopy(diagram)
sram = next(row for row in regions if row["symbol"] == "SRAM")
for node in result["nodes"]:
node["label"] = node["label"].replace("{sram_kib}", str(sram["size"] // 1024))
return {result["id"]: result}
tests/test_publication_full_diagrams.py
+3 -2
View File
@@ -40,7 +40,8 @@ def test_every_frozen_chapter_has_explicit_diagram_coverage(diagrams):
assert len(diagrams["circuits"]) == 45
assert len(diagrams["layouts"]) == 38
assert len(diagrams["storage"]) == 42
assert len(expected) == 135
assert len(diagrams["soc_architecture"]) == 1
assert len(expected) == 136
for identifier in contract["ip_ids"]:
row = next(row for row in rows if row["anchor"] == identifier)
assert row["categories"]["circuiteria"]["diagrams"] == ["circuiteria:" + identifier]
@@ -49,7 +50,7 @@ def test_every_frozen_chapter_has_explicit_diagram_coverage(diagrams):
@pytest.mark.parametrize("mutation", ["missing", "duplicate", "unknown", "bad-page"])
def test_declared_but_unused_or_duplicate_diagrams_fail_build(diagrams, mutation):
records = [{**item, "page": index + 1} for index, item in enumerate(inventory(diagrams).values())]
assert len(validate_usage(diagrams, records)) == 135
assert len(validate_usage(diagrams, records)) == 136
if mutation == "missing":
records.pop()
elif mutation == "duplicate":
tests/test_publication_soc_overview.py
+84
View File
@@ -0,0 +1,84 @@
"""Dense overview labels and fan-in must stay tied to current PRODUCT sources."""
from __future__ import annotations
import copy
import json
from pathlib import Path
import pytest
from publications.soc_diagram_reference import validate_soc_diagram
ROOT = Path(__file__).resolve().parents[1]
@pytest.fixture
def diagram():
return json.loads((ROOT / "publications/datasheets/soc-architecture.json").read_text(encoding="utf-8"))
def test_dense_overview_retains_instances_and_independent_gateway_fan_in(diagram):
validate_soc_diagram(ROOT, diagram)
assert diagram["font_weight"] == 400
assert [len(gateway["members"]) for gateway in diagram["gateways"]] == [3, 2]
assert len(diagram["masters"]) == 9
nodes = {node["id"]: node for node in diagram["nodes"]}
assert nodes["sram"]["domain"] == nodes["monitor"]["domain"] == "hp"
assert nodes["gwa"]["domain"] == nodes["gwb"]["domain"] == "pclk"
assert {nodes[id]["domain"] for id in ["sdram", "qpi", "opi", "xpi"]} == {"memory"}
assert diagram["pclk_parent"] == "lp"
@pytest.mark.parametrize("mutation", ["bold", "small-font", "module-width-label", "wire-width-label",
"gateway-input", "gateway-output", "gateway-source", "bridge-width",
"printed-width", "bus-width", "clock-domain", "clock-pin", "clock-parent",
"interface-source", "interface-token", "interface-af", "interface-bus",
"ip-coverage", "instance-coverage", "stream-source", "missing-source"])
def test_overview_rejects_visual_claims_that_contradict_its_scope_or_sources(diagram, mutation):
nodes = {node["id"]: node for node in diagram["nodes"]}
if mutation == "bold":
diagram["font_weight"] = 700
elif mutation == "small-font":
diagram["font_size_pt"] = 8
elif mutation == "module-width-label":
nodes["dma"]["label"] += " AXI32"
elif mutation == "wire-width-label":
diagram["edges"][0]["label"] = "AXI64"
elif mutation == "gateway-input":
diagram["edges"] = [edge for edge in diagram["edges"] if not (edge["from"] == "apu" and edge["to"] == "gwa")]
elif mutation == "gateway-output":
edge = copy.deepcopy(next(edge for edge in diagram["edges"] if edge["from"] == "gwa"))
edge["to"] = "hp_bus"
diagram["edges"].append(edge)
elif mutation == "gateway-source":
diagram["gateways"][0]["members"]["icache"]["signal"] = "jpeg_axi4"
elif mutation == "bridge-width":
diagram["bridges"][0]["input_bits"] = 32
elif mutation == "printed-width":
nodes["gca"]["label"] = "AXI64→AXI32 / CDC"
elif mutation == "bus-width":
nodes["hp_bus"]["label"] = "HP data interconnect · AXI32"
elif mutation == "clock-domain":
nodes["sram"]["domain"] = "pclk"
elif mutation == "clock-pin":
nodes["sram"]["clock"]["signal"] = "clk_lp_i"
elif mutation == "clock-parent":
diagram["pclk_parent"] = "hp"
elif mutation == "interface-source":
diagram["interfaces"][0]["source"] = "missing.sv"
elif mutation == "interface-token":
diagram["interfaces"][0]["tokens"] = ["nonexistent_pin"]
elif mutation == "interface-af":
next(row for row in diagram["interfaces"] if "af_prefix" in row)["af_prefix"] = "u_nonexistent_if."
elif mutation == "interface-bus":
next(row for row in diagram["interfaces"] if "pin_bus" in row)["pin_bus"]["count"] += 1
elif mutation == "ip-coverage":
nodes["crypto"]["ips"] = []
elif mutation == "instance-coverage":
nodes["i2c1"]["id"] = "merged-i2c"
elif mutation == "stream-source":
diagram["stream_bindings"][0]["ports"]["i2s_tx_axis"] = "wrong_stream"
else:
diagram["sources"].remove("rtl/mini/pin_map/pin_map.json")
with pytest.raises(ValueError, match="SoC diagram"):
validate_soc_diagram(ROOT, diagram)
tests/test_publication_typography.py
+12
View File
@@ -42,3 +42,15 @@ def test_unmarked_or_partly_outside_text_keeps_nine_point_minimum(overrides, pag
def test_even_marked_continuation_text_cannot_shrink_below_eight_point_five():
with pytest.raises(ValueError, match="smaller than 8.5 pt"):
validate_character_size(character(size=8), 2, [REGION])
def test_quarter_turn_uses_rendered_font_height_not_glyph_advance():
validate_character_size(character(size=2.2, width=9, matrix=(0, 1, -1, 0, 0, 0)), 1, [])
with pytest.raises(ValueError, match="smaller than 9 pt"):
validate_character_size(character(size=12, width=8, matrix=(0, -1, 1, 0, 0, 0)), 1, [])
def test_wide_upright_or_slanted_glyph_does_not_bypass_type_minimum():
for matrix in [(1, 0, 0, 1, 0, 0), (.7, .7, -.7, .7, 0, 0)]:
with pytest.raises(ValueError, match="smaller than 9 pt"):
validate_character_size(character(size=8, width=12, matrix=matrix), 1, [])