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chore: replace wave comp flag with binary check format

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maksyuki committed 2026-03-17 19:52:52 +08:00
1 parent 95c62a0792
commit bf08ed1d68
4 files changed
+19 -51
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Makefile
+5 -5
View File
@@ -5,15 +5,15 @@ TIMI ?= NONE
# HW
PDK ?= ICS55
HAVE_PLL ?= YES
HAVE_SRAM_IF ?= YES
HAVE_SRAM_MACRO ?= YES
HAVE_PLL ?= NO
HAVE_SRAM_IF ?= NO
HAVE_SRAM_MACRO ?= NO
HAVE_SVA ?= NO
WAVE ?= NO
RTL_SIM_PLLEN ?= NONE
RTL_SIM_PLLCFG ?= NONE
RTL_SIM_CORESEL ?= 0
WAVE ?= NONE
ROOT_PATH ?= $(CURDIR)
RTL_PATH ?= NONE
@@ -51,10 +51,10 @@ $(info HAVE_PLL [YES, NO]: $(HAVE_PLL))
$(info HAVE_SRAM_IF [YES, NO]: $(HAVE_SRAM_IF))
$(info HAVE_SRAM_MACRO [YES, NO]: $(HAVE_SRAM_MACRO))
$(info HAVE_SVA [YES, NO]: $(HAVE_SVA))
$(info WAVE: [YES, NO]: $(WAVE))
$(info RTL_SIM_PLLEN: $(RTL_SIM_PLLEN))
$(info RTL_SIM_PLLCFG: $(RTL_SIM_PLLCFG))
$(info RTL_SIM_CORESEL: $(RTL_SIM_CORESEL))
$(info WAVE: $(WAVE))
$(info ============== SW CONFIG INFO ===================================)
$(info ISA [RV32E RV32I RV32IM]: $(ISA))
$(info HAVE_CSR [YES, NO]: $(HAVE_CSR))
crt/src/tinybooter.c
+10 -10
View File
@@ -82,18 +82,18 @@ void app_info() {
printf(" FREQ: %dMHz\n\n", CPU_FREQ);
printf("Inst/Memory Address Range:\n");
printf(" QSPI Flash: @[0x%08x-0x%08x] %dMiB\n", SPFS_MEM_START, SPFS_MEM_START + SPFS_MEM_OFFST - 1, SPFS_MEM_OFFST / 1024 / 1024);
printf(" NMI IP MMIO: @[0x%08x-0x%08x] %dMiB\n", NMI_MEM_START, NMI_MEM_START + NMI_MEM_OFFST - 1, NMI_MEM_OFFST / 1024 / 1024);
printf(" APB IP MMIO: @[0x%08x-0x%08x] %dMiB\n", APB_MEM_START, APB_MEM_START + APB_MEM_OFFST - 1, APB_MEM_OFFST / 1024 / 1024);
printf(" On-chip RAM: @[0x%08x-0x%08x] %dKiB\n", SRAM_MEM_START, SRAM_MEM_START + SRAM_MEM_OFFST - 1, SRAM_MEM_OFFST / 1024);
printf(" Off-chip SDRAM: @[0x%08x-0x%08x] %dMiB\n", SDRAM_MEM_START, SDRAM_MEM_START + SDRAM_MEM_OFFST - 1, SDRAM_MEM_OFFST / 1024 / 1024);
printf(" Off-chip PSRAM: @[0x%08x-0x%08x] %dMiB(%dx8MiB)\n", PSRAM_MEM_START, PSRAM_MEM_START + PSRAM_MEM_OFFST - 1, 8 * PSRAM_NUM, PSRAM_NUM);
printf(" Off-chip OPIPSRAM: @[0x%08x-0x%08x] %dMiB\n", OPIPSRAM_MEM_START, OPIPSRAM_MEM_START + OPIPSRAM_MEM_OFFST - 1, PSRAM_MEM_OFFST / 1024 / 1024);
printf(" XPI MMIO: @[0x%08x-0x%08x] %dMiB\n", XPI_MEM_START, XPI_MEM_START + XPI_MEM_OFFST - 1, XPI_MEM_OFFST / 1024 / 1024);
printf(" SPISD MMIO: @[0x%08x-0x%08x] %dGiB\n\n", TF_CARD_START, TF_CARD_START + TF_CARD_OFFST - 1, TF_CARD_OFFST / 1024 / 1024 / 1024);
printf(" QSPI Flash: @[0x%08x-0x%08x] %3d MiB\n", SPFS_MEM_START, SPFS_MEM_START + SPFS_MEM_OFFST - 1, SPFS_MEM_OFFST / 1024 / 1024);
printf(" NMI IP MMIO: @[0x%08x-0x%08x] %3d MiB\n", NMI_MEM_START, NMI_MEM_START + NMI_MEM_OFFST - 1, NMI_MEM_OFFST / 1024 / 1024);
printf(" APB IP MMIO: @[0x%08x-0x%08x] %3d MiB\n", APB_MEM_START, APB_MEM_START + APB_MEM_OFFST - 1, APB_MEM_OFFST / 1024 / 1024);
printf(" On-chip RAM: @[0x%08x-0x%08x] %3d KiB\n", SRAM_MEM_START, SRAM_MEM_START + SRAM_MEM_OFFST - 1, SRAM_MEM_OFFST / 1024);
printf(" Off-chip SDRAM: @[0x%08x-0x%08x] %3d MiB\n", SDRAM_MEM_START, SDRAM_MEM_START + SDRAM_MEM_OFFST - 1, SDRAM_MEM_OFFST / 1024 / 1024);
printf(" Off-chip PSRAM: @[0x%08x-0x%08x] %3d MiB(%dx8MiB)\n", PSRAM_MEM_START, PSRAM_MEM_START + PSRAM_MEM_OFFST - 1, 8 * PSRAM_NUM, PSRAM_NUM);
printf(" Off-chip OPIPSRAM: @[0x%08x-0x%08x] %3d MiB\n", OPIPSRAM_MEM_START, OPIPSRAM_MEM_START + OPIPSRAM_MEM_OFFST - 1, PSRAM_MEM_OFFST / 1024 / 1024);
printf(" XPI MMIO: @[0x%08x-0x%08x] %3d MiB\n", XPI_MEM_START, XPI_MEM_START + XPI_MEM_OFFST - 1, XPI_MEM_OFFST / 1024 / 1024);
printf(" SPISD MMIO: @[0x%08x-0x%08x] %3d GiB\n\n", TF_CARD_START, TF_CARD_START + TF_CARD_OFFST - 1, TF_CARD_OFFST / 1024 / 1024 / 1024);
printf("Memory Map IO Device:\n");
printf(" 8 x GPIO @0x%x\n", &reg_gpio_oe);
printf(" 32 x GPIO @0x%x\n", &reg_gpio_oe);
printf(" 1 x UART0 @0x%x\n", &reg_uart0_clkdiv);
printf(" 2 x TIMER(0,1) @0x%x,0x%x\n", &reg_tim0_cfg, &reg_tim1_cfg);
printf(" 1 x PSRAM @0x%x\n", &reg_psram_wait);
rtl/mini/script/vcs.mk
+2 -3
View File
@@ -32,8 +32,7 @@ SIM_OPTIONS := -full64 +v2k -sverilog -timescale=1ns/10ps \
TIME_OPTION := +notimingcheck +nospecify
# NET_PATH := -v $(ROOT_PATH)/syn/yosys/.synth_build/out/retrosoc_asic_yosys.v
NET_PATH := -v /nfs/share/home/miaoyuchi/Flow_CX55_MPW/syn/netlist/retrosoc_asic_v1.syn.v.gz
NET_PATH := -v $(ROOT_PATH)/syn/yosys/.synth_build/out/retrosoc_asic_yosys.v
POST_PATH := -v /nfs/share/temp/flow_110/bes_data/sta/sdf/retrosoc_asic_CTS_MIN_CMIN_SDF_Mar_10_00/retrosoc_asic.v
SDF_FILE := "/nfs/share/temp/flow_110/bes_data/sta/sdf/retrosoc_asic_CTS_MIN_CMIN_SDF_Mar_10_00/retrosoc_asic_CTS_MIN.sdf.gz"
@@ -51,7 +50,7 @@ comp:
cd $(RTL_PATH)/.build && ($(SIM_TOOL) $(SIM_OPTIONS) $(TIME_OPTION) $(RTL_FLIST) $(TB_FLIST) -top $(RTL_TOP) $(COMP_LOG))
sim: comp
cd $(RTL_PATH)/.build && ($(SIM_BINY) +vcs+loopreport+1000 -suppress=ASLR_DETECTED_INFO +$(RTL_SIM_PLLEN) +$(RTL_SIM_PLLCFG) +core_sel=$(RTL_SIM_CORESEL) +behv_$(WAVE) +sim_vcs $(SIM_LOG))
cd $(RTL_PATH)/.build && ($(SIM_BINY) +vcs+loopreport+1000 -suppress=ASLR_DETECTED_INFO +$(RTL_SIM_PLLEN) +$(RTL_SIM_PLLCFG) +core_sel=$(RTL_SIM_CORESEL) +wave_$(WAVE) +sim_vcs $(SIM_LOG))
wave:
cd $(RTL_PATH)/.build && ($(VERDI_TOOL) -ssf $(RTL_TOP).fsdb -nologo &)
rtl/mini/tb/retrosoc_tb.sv
+2 -33
View File
@@ -375,43 +375,12 @@ module retrosoc_tb;
end
initial begin
if ($test$plusargs("behv_wave")) begin
$display("gen behv sim wave");
if ($test$plusargs("wave_YES")) begin
$display("== generate simulation wave ==");
$fsdbDumpfile("retrosoc_tb.fsdb");
$fsdbDumpvars(0);
$fsdbDumpMDA();
// #398844962;
// #867652;
// #145541740;
// #205541740;
// #382928081;
// #300000;
#47050000;
// #86869320;
// #21149063;
// #1667652;
// #327820116;
// #327179489;
// #836901000;
// #468320000;
// #505600311;
// #507983431
// #507983430;
// #535996319;
// #543128473;
// #577859417; // pure
// #585923415;
// #1070933733; // debug spi
// #873310000;
// #340686376;
// #489238714;
$finish;
end else if ($test$plusargs("syn_wave")) begin
$display("gen syn sim wave");
$fsdbDumpfile("retrosoc_tb_syn.fsdb");
$fsdbDumpvars(0);
#21149063;
$finish;
end
end