mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
feat: refactor UART and Timer Interfaces; Remove Unused Components
- Deleted the UART interface and related components from the RTL design, including the UART TX/RX signals and instances. - Removed the timer interface and its associated files from the project, including the timer definitions and references in the integration files. - Updated the APB target configurations to reflect the removal of the UART and timer components, ensuring the IRQ and memory map configurations are consistent. - Adjusted the formal verification properties and testbenches to exclude references to the removed components. - Cleaned up the integration documentation to accurately describe the current state of the system without the UART and timer interfaces.
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@@ -82,7 +82,11 @@ def test_topology_generates_complete_rib_apb_and_gpio_bindings(tmp_path: Path) -
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assert "assign s_xpi_region_sel[1] = (ribp.addr <= `SOC_ADDR_FLASH_END);" in routes
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assert "assign u_sdio_ribp_if.valid = 1'b0;" in routes
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assert gpio.count("// GPIO") == 64
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assert "assign u_uart1_if.rx_i = u_gpio_if.di_i[0];" in gpio
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assert "u_uart1_if" not in gpio
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assert "assign u_gpio_if.alt0_do_i[0] = 1'b0;" in gpio
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assert "assign u_gpio_if.alt0_oe_i[0] = 1'b0;" in gpio
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assert "assign u_gpio_if.alt0_do_i[1] = 1'b0;" in gpio
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assert "assign u_gpio_if.alt0_oe_i[1] = 1'b0;" in gpio
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assert "assign u_gpio_if.alt1_do_i[0] = u_ps2_if.ps2_clk_o;" in gpio
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assert "assign u_gpio_if.alt1_oe_i[0] = u_ps2_if.ps2_clk_oe_o;" in gpio
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assert "assign u_gpio_if.alt1_do_i[1] = u_ps2_if.ps2_dat_o;" in gpio
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@@ -95,11 +99,12 @@ def test_topology_generates_complete_rib_apb_and_gpio_bindings(tmp_path: Path) -
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assert "assign u_pwm_if.capture_i[0] = u_gpio_if.di_i[30];" in gpio
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assert "assign u_pwm_if.capture_i[1] = u_gpio_if.di_i[31];" in gpio
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assert "assign u_gpio_if.alt1_do_i[22] = u_psram_if.nss_o[0];" in gpio
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assert apb_interfaces.count("apb4_if u_") == 10
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assert "s_tmr_capch" not in gpio
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assert apb_interfaces.count("apb4_if u_") == 8
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assert "apb4_pure_if u_archinfo_apb_pure_if ();" in apb_interfaces
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assert "assign tmr.paddr = s_addr_q;" in apb_routes
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assert "({32{s_psel_q[8]}} & tmr.prdata)" in apb_response
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assert "localparam int NSLV = 10;" in apb_declarations
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assert "assign user_ip.paddr = s_addr_q;" in apb_routes
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assert "({32{s_psel_q[7]}} & user_ip.prdata)" in apb_response
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assert "localparam int NSLV = 8;" in apb_declarations
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assert fabric.count("ribp_if u_") == 1
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assert fabric.count("rib_if u_") == 4
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assert ".mgmt_ribp(u_mgmt_ribp_if)" in bus_fabric
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@@ -107,16 +112,20 @@ def test_topology_generates_complete_rib_apb_and_gpio_bindings(tmp_path: Path) -
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assert ".apb_rib(u_apb_rib_if)" in bus_fabric
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assert ".rib(u_rib_if)" in bus_fabric
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assert "`define SOC_IRQ_VECTOR_WIDTH 32" in irq_config
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assert "`define SOC_USER_IRQ_MASK 32'h000EFFFC" in irq_config
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assert "`define SOC_USER_IRQ_MASK 32'h000E7BFC" in irq_config
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assert "`define SOC_IRQ_RIBP_WIDTH 13" in irq_config
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assert "`define SOC_IRQ_APB_WIDTH 7" in irq_config
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assert "`define SOC_IRQ_APB_WIDTH 5" in irq_config
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assert "assign irq_o[0] = u_clint_if.software_irq_o[0];" in rib_irq
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assert "assign irq_o[10] = ws2812.irq_o;" in rib_irq
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assert "assign irq_o[11] = gpio.irq_o;" in rib_irq
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assert "assign irq_o[12] = i2c1.irq_o;" in rib_irq
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assert "assign irq_o[5] = u_tmr_if.irq_o;" in apb_irq
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assert "assign irq_o[6] = s_rng_irq;" in apb_irq
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assert "s_irq[16] = s_apb_irq[6];" in irq_wiring
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assert "assign irq_o[0] = pwm.irq_o;" in apb_irq
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assert "assign irq_o[4] = s_rng_irq;" in apb_irq
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assert "s_irq[10]" not in irq_wiring
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assert "s_irq[15]" not in irq_wiring
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assert "s_irq[16] = s_apb_irq[4];" in irq_wiring
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assert "irq_i[10] == 1'b0" in irq_sva
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assert "irq_i[15] == 1'b0" in irq_sva
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assert "irq_i[31] == 1'b0" in irq_sva
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assert "bind retrosoc soc_irq_topology_sva" in irq_sva
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assert filelist.startswith("+incdir+")
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@@ -135,7 +144,7 @@ def test_topology_preserves_default_irq_compatibility_mapping() -> None:
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)
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for interrupt in document["interrupts"]
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]
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assert mappings[:20] == [
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assert mappings == [
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("clint_software", "ribp", 0, 0, "u_clint_if.software_irq_o[0]"),
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("clint_timer", "ribp", 1, 1, "u_clint_if.timer_irq_o[0]"),
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("uart0", "ribp", 2, 2, "uart.irq_o"),
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@@ -146,18 +155,15 @@ def test_topology_preserves_default_irq_compatibility_mapping() -> None:
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("i2c0", "ribp", 7, 7, "i2c0.irq_o"),
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("i2s", "ribp", 8, 8, "i2s.irq_o"),
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("xpi", "ribp", 9, 9, "xpi.irq_o"),
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("uart1", "apb", 0, 10, "uart.irq_o"),
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("pwm", "apb", 1, 11, "pwm.irq_o"),
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("ps2", "apb", 2, 12, "ps2.irq_o"),
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("rtc", "apb", 3, 13, "u_rtc_if.irq_o"),
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("watchdog_early_warning", "apb", 4, 14, "u_wdg_if.irq_o"),
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("advanced_timer", "apb", 5, 15, "u_tmr_if.irq_o"),
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("rng", "apb", 6, 16, "s_rng_irq"),
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("pwm", "apb", 0, 11, "pwm.irq_o"),
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("ps2", "apb", 1, 12, "ps2.irq_o"),
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("rtc", "apb", 2, 13, "u_rtc_if.irq_o"),
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("watchdog_early_warning", "apb", 3, 14, "u_wdg_if.irq_o"),
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("rng", "apb", 4, 16, "s_rng_irq"),
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("ws2812", "ribp", 10, 17, "ws2812.irq_o"),
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("gpio", "ribp", 11, 18, "gpio.irq_o"),
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("i2c1", "ribp", 12, 19, "i2c1.irq_o"),
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]
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assert all(mapping[3] >= 20 for mapping in mappings[20:])
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def test_topology_always_adds_the_user_apb_target(tmp_path: Path) -> None:
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@@ -172,12 +178,12 @@ def test_topology_always_adds_the_user_apb_target(tmp_path: Path) -> None:
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)
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assert "apb4_if u_user_ip_apb_if (clk_i, rst_n_i);" in interfaces
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assert "localparam int NSLV = 10;" in declarations
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assert "s_psel_q[9]" in response
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assert "localparam int NSLV = 8;" in declarations
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assert "s_psel_q[7]" in response
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assert "apb4_pure_if user_ip ();" in formal_design
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assert ".user_ip (user_ip)" in formal_design
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assert "logic [ 9:0] psel_comb" in formal_design
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assert "wire [ 9:0] psel_comb" in formal_properties
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assert "logic [ 7:0] psel_comb" in formal_design
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assert "wire [ 7:0] psel_comb" in formal_properties
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def test_topology_rejects_unknown_or_non_rib_regions(tmp_path: Path) -> None:
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@@ -222,7 +228,7 @@ def test_topology_rejects_invalid_apb_target_ownership(tmp_path: Path) -> None:
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assert "not an active APB region" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["apb_targets"][8]["slot"] = 0
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document["apb_targets"][7]["slot"] = 0
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "APB target slot 0 is duplicated" in result.stderr
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@@ -268,7 +274,12 @@ def test_topology_rejects_invalid_irq_groups_and_bindings(tmp_path: Path) -> Non
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assert "core interrupt bit 0 is duplicated" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["interrupts"].pop(16)
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rng_index = next(
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index
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for index, interrupt in enumerate(document["interrupts"])
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if interrupt["name"] == "rng"
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)
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document["interrupts"].pop(rng_index)
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "interrupt group apb does not cover every group bit" in result.stderr
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