docs(tiny): record R2-P10 validation and remaining gaps

Document the P10 workload, profile selection, exact command matrix,
single-execution policy and retained source/binary identities. Record
matched performance, camera/audio/backend results, P7 and VGA follow-ups,
and the approved quality repairs with their original phase attribution.

Preserve failed attempts and distinguish later successful checks from
historical evidence. Record 2031 passed / 1 skipped for the final Pytest
run, five firmware builds and four byte-identical Tiny HEX comparisons.

Keep phase_accepted=false. Full long Icarus and complete supported
regression, publication/PDF readiness and final physical/PVT/board/sensor
qualification remain open; observed timing is not timing closure.

Validation: documentation links and commands checked; git diff --check
passes. The existing evidence remains bound to its pre-commit revision.
This commit is contained in:
maksyuki committed 2026-10-18 20:52:13 +08:00
1 parent 1d5959680e
commit e62ccdad87
4 files changed
+846

No files matched your search

+4
View File
@@ -90,6 +90,10 @@ See the [P8 runbook](../docs/ip/tiny-soc-r2-psram.md) for bounded DMA and eviden
use `TINY_SIM_ARGS='+tiny_psram +tiny_p9_camera'` for the pin-level camera
model. The optional `TINY_P9_QUICK=YES` selector is a small focused smoke image,
not QVGA/VGA acceptance. See the [P9 runbook](../docs/ip/tiny-soc-r2-dvp.md).
`TINY_P10_ACCEPTANCE=YES APP=ci_smoke` selects the separate SAFE24 QVGA
capture, CPU statistics and SDIO save/readback image. It is mutually exclusive
with P7/P8/P9 acceptance flags and does not change the ordinary image or its
configuration key. See the [P10 runbook](../docs/ip/tiny-soc-r2-system-performance.md).
`TINY_P9_WORKLOAD=VGA_YUV422` selects the full 640x480 YUV422 image and
changes its configuration digest. It requires P9 acceptance with QUICK=NO;
the default `QVGA_RGB565` retains the existing configuration key. Pair the
+434
View File
@@ -0,0 +1,434 @@
# Tiny R2-P10 system performance and regression qualification
This runbook implements the approved bounded campaign for
[TINY-R2-P10](tiny-soc.md#tiny-r2-p10---system-performance-and-regression-qualification).
The source starts at `5b81dea4fe0a68aabb51f42f01422068280192b2` plus the archived
implementation worktree. The frozen specification and dependency lock remain
unchanged. The [verification ledger](tiny-soc-verification.md) records actual
results; this document is not a passing qualification report.
## Configuration and ownership
Use `configs/ci/ics55-tiny.mk` (default ICS55, PLL present) and
`configs/ci/ihp130-tiny.mk` (no-PLL compatibility). All P10 application and
performance workloads stay on SAFE24: CPU and all main SRAM use SYS24,
XPI uses MEM24, and peripheral service uses PCLK24. The independent P6 audio
reference remains 18.432 MHz. No clock transition, additional SRAM, new
register, DMA allocation, pad route, shared HAL or dependency change is
introduced. P9's DMA2/request11 and IRQ15 remain unchanged; Mini is unaffected.
`TINY_P10_ACCEPTANCE=YES APP=ci_smoke` selects only the new camera application.
It has a distinct configuration digest and rejects simultaneous P7/P8/P9
acceptance selection. The default image and ordinary application keys remain
unchanged. The audio workload uses the existing complete P6 acceptance image.
The existing `FIRMWARE_NAME=retrosoc_p10_replay` build setting isolates the
replay model from application and backend variants; old binaries keep their
original compiler, source and configuration identity.
## Fixed workloads
The `matched` stage executes each retained image once on a fresh Verilator
model. ICS55 reuses the two P3 O2/no-LTO flat/banked images referenced by the
completed P5 report; IHP130 reuses the original P1 image referenced by its
repaired report. The P1 protocol has sixteen destinations and seven cases;
P3 has four destinations and eight cases, including chunked DMA. Never compare
P1 and P3 payloads as if they were identical work.
The ICS55-only `software` stage reuses that same compiled model and executes
the other six retained P3 images once. Together the stages cover COMPAT/Os,
TINY_PERF O2/O3/Os with and without LTO, and the O2/no-LTO banked placement.
No compiler default is changed, no old binary is rebuilt, and no historical
three-repetition protocol is weakened. These new single-run results are P10
observations. P5-to-current dependency changes include the PWM revision;
whole-platform differences are not attributed exclusively to CPU/fabric RTL.
The `audio` stage executes ordinary Tiny acceptance with `+tiny_p10_audio`.
It retains both 16/24-bit, 256-frame audio cases; 33/65-word WS frames with
watermark 8 and bounded finite refills; channel-2 background copies/TCDs;
the existing pad decoders, payload/guard checks, recovery cases and independent
SDIO/central-DMA contention. Channel 3 is owned until WS wire completion.
The existing 4800-PCLK-cycle WS service limit and exact wire checks remain
required. P10 adds passive windowed transaction/concurrency observations.
The `camera` stage uses RGB565 320x240 at a 500 ns pixel half-period and the
existing pin-level camera/NSS1 PSRAM. Capture writes 153600 bytes at
`0x54010000`, checks source/DMA completion, final responses, errors and guards,
then stops capture before any processing or SD operation. CPU processing
checks every word and computes the red-component 32-bin histogram and a
word-wise modulo-32-bit FNV-style checksum. The independent oracle expects
76800 pixels and checksum `2323003269`; hashes never replace full comparison.
The original frame is saved at LBA16..315 using 150 two-sector transactions.
Two guarded, 64-byte-aligned 1024-byte SRAM buffers provide the bounce/readback
storage. Every saved chunk is read back through SDIO and compared with the
independent camera pattern. The existing 1024-sector native-card model and
its two-block command/data stimulus are reused unchanged. This is application
save/readback evidence, not direct PSRAM-to-SDIO DMA, a filesystem, card
compliance, continuous video, or physical sensor qualification.
Each SDIO operation additionally fetches a 16-byte descriptor and writes back
its 4-byte status. The 300 operations therefore add 4800 read bytes and 1200
write bytes to the AXI totals; those bytes must be reported separately from
the saved/read-back pixel payload.
## Measurement and verdict
Camera phase records separate capture, CPU processing, bounce copying,
SDIO writing, and SDIO readback/verification. Stable RV32 high/low/high reads
provide cycle/instret deltas. Initialization and UART records are outside the
windows. Firmware counters and PERF_CTRL observer boundaries differ and are
reported without automatic calibration subtraction.
`tiny_p10_observer` records actual AXI accepts, B/RLAST completions, successful
read bytes, accepted write strobes, response errors and longest channel stalls.
Initial/final pending counts preserve transactions crossing a measurement
boundary; CPU censored transactions are not zero-latency completions. Bank
overlap counts cycles with actual issues in multiple groups, while DMA beat
overlap requires simultaneous real R/W handshakes. These are testbench
observations, not new hardware counters or universal worst-case guarantees.
P4's directed tests retain the conditional three-SYS-cycle local budget.
Camera acceptance also checks 38400 source/delivered words, pixel period,
FIFO high-water and longest backpressure. It reserves 16 bytes of the existing
512-byte payload FIFO and conservatively applies the measured high-water
occupancy to the no-service budget at 1 MB/s input. Per-frame equality and
full readback establish drainage for the exercised line/blanking pattern.
Every simulation needs exit zero, exactly one terminal `SIM_TEST_PASS Tiny`,
the complete workload records and no repository forbidden error marker. An
Icarus fatal that exits zero is still a failure. UART alone cannot pass.
Every stage retains its command/results, immutable binary/model identities,
source archives and lock/tool identity. Successful replay records keep image
provenance distinct from the candidate RTL snapshot.
## Execution and evidence
Activate the verified environment; use one new timestamp after executable
inputs change. Do not run the old baseline/matrix entrypoints, which retain
their historical three-run semantics.
```sh
source .cache/retrosoc/development/tiny-r2-p1/activate.sh
export BUILD_TIMESTAMP=$(date +%Y-%m-%d-%H-%M)
python3 scripts/tiny_r2_p10.py --root . --pdk ICS55 \
--timestamp "$BUILD_TIMESTAMP" --jobs 4 --stage matched --dry-run
python3 scripts/regress.py --root . --suite pr --soc TINY --pdk ICS55 --dry-run
python3 scripts/regress.py --root . --suite nightly --soc TINY --pdk ICS55 --dry-run
```
After focused tests, software gates and the selected dry-runs, execute stages
in order: `matched`, `software` (ICS55 only), `audio`, `camera`, `backend`,
`report`. Replace the dry-run invocation above with the selected stage and
omit `--dry-run`; repeat the required stages with `--pdk IHP130`. Each stage
expands explicit Tiny/profile/PDK commands. Replay/application output roots
remain separate from the ordinary backend variant.
The backend runs Verilator lint, one balanced Yosys synthesis with its existing
10800-second allowance, compact boot and DVP netlist checks, OpenSTA and
warning/metric observations. DVP reuses the boot-compiled netlist executable
only after identity checking. No netlist function or synthesis failure is
waived by observational timing policy. No physical adapter is executed.
Evidence lives below each variant's `meta/tiny-r2-p10/<stage>/`. Existing
successful stages may be reused only with `--resume` and matching sources and
artifacts. Failed/interrupted stages never silently retry or inherit an older
PASS. Stage records and streaming Make logs preserve process IDs, commands,
start/end times and terminal state. A missing PID without a successful result
is incomplete evidence. PID values belong to the launcher's process namespace;
a later isolated shell's `ps` may not see a still-live execution session.
Use the retained execution session, logs and structured terminal results
together, not a cross-namespace PID lookup alone. Poll long simulations
roughly every 30 minutes.
The P10 collector correction separates SDIO descriptor/status traffic from
pixel payload before the first camera execution. It changes only
`scripts/tiny_r2_p10.py` and `tests/test_tiny_r2_p10.py`; the already completed
matched/software/audio/backend records keep their original source identity.
For final collection across this explicit correction, use a fresh camera
timestamp and name the original campaign with `--retained-timestamp`:
```sh
python3 scripts/tiny_r2_p10.py --root . --pdk ICS55 \
--timestamp "$BUILD_TIMESTAMP" --stage report \
--retained-timestamp 2026-10-17-15-56 --allow-collector-update
```
These options are report-only. The reader requires identical before/after
inputs in each original execution, checks all retained artifacts, and accepts
only the two named collector/test paths as a subsequent source delta. RTL,
firmware, Make, dependency or unrelated test changes are rejected. The report
lists the original execution digest and the new validation delta separately;
it never assigns the new collector hash to an older run. Repeat with IHP130
for that profile's separate report. The original full-Pytest failures remain
recorded, alongside the focused post-correction checks.
The selected campaign can finish while full P10 acceptance remains open.
Full long Icarus firmware is explicitly deferred to final Tiny qualification;
the current PR/nightly matrix also includes P7 clock-transition cases outside
this SAFE24 performance campaign. Preserve that complete matrix as unrun
coverage instead of claiming that a filtered run passes it. Global publication
and formatting failures, warning deltas, negative STA, fresh full-system VGA,
and physical/PVT/board/sensor gaps remain explicitly attributed. Metrics stay
in observe mode; no speedup threshold, new operating point, phase acceptance,
commit, push or later-phase advancement follows from the report.
## Completed selected campaign
The 2026-10-17 execution uses `2026-10-17-15-56` for the original stages and
`2026-10-17-21-20` for the first camera executions and final reports. Both
camera runs pass the full 153600-byte capture, CPU comparison/statistics and
300-sector save/readback workload. Each image runs once; the recorded wall
durations are 6966.317 seconds (ICS55) and 5002.673 seconds (IHP130).
The final collection commands are:
```sh
source .cache/retrosoc/development/tiny-r2-p1/activate.sh
python3 scripts/tiny_r2_p10.py --root . --pdk ICS55 \
--timestamp 2026-10-17-21-20 --stage report \
--retained-timestamp 2026-10-17-15-56 --allow-collector-update
python3 scripts/tiny_r2_p10.py --root . --pdk IHP130 \
--timestamp 2026-10-17-21-20 --stage report \
--retained-timestamp 2026-10-17-15-56 --allow-collector-update
```
Reports are retained at
`build/ics55-tiny-2026-10-17-21-20-ff4b5cef6eb5/meta/tiny-r2-p10/report/report.json`
and
`build/ihp130-tiny-2026-10-17-21-20-8232fa11e7f3/meta/tiny-r2-p10/report/report.json`.
Both have `selected_gates_complete` and `phase_accepted=false`. The ICS55
report also indexes the shared validation attempts under
`build/ics55-tiny-2026-10-17-15-56-ff4b5cef6eb5/meta/tiny-r2-p10/validation/`;
the IHP130 report does not duplicate those common checks. Read these reports
with the [ledger](tiny-soc-verification.md#tiny-r2-p10-approved-implementation-campaign-2026-10-17),
which records the full Pytest and Make-format failures, warning/STA
observations, unrun coverage, exact measured results and human acceptance gate.
An empty per-report stage-gap list does not close those broader obligations.
## P7 and VGA follow-up
The approved 2026-10-18 follow-up adds only one P7 lifecycle and one full
VGA/YUV422 Verilator execution per PDK. It reuses the existing firmware,
monitors and P9 runner. P7 starts on SAFE24 and tests its existing logical
clock profiles; VGA remains on SAFE24. No production input changes or
automatic retries are included. The original P10 matched/software/audio/
camera/backend reports stay immutable.
Capture Tiny PR and nightly dry-runs for each PDK first. Their current
expansions are identical, so a future complete matrix can avoid duplicate
execution only after checking that equivalence again. This follow-up executes
only the selected P7 command, not the whole matrix. Full Icarus stays deferred.
The retained timestamp is `2026-10-18-09-20`; use a new timestamp for any
separately approved retry. The command shapes below are already executed:
```bash
# Set P10_FOLLOWUP_STAMP only for an approved fresh execution.
for p10_pdk in ICS55 IHP130; do
p10_make=(make --no-print-directory
"CONFIG=configs/ci/${p10_pdk,,}-tiny.mk" SOC=TINY "PDK=$p10_pdk"
"BUILD_TIMESTAMP=$P10_FOLLOWUP_STAMP" JOBS=4 APP=ci_smoke
SIMU=VERILATOR TINY_P7_ACCEPTANCE=YES TINY_P10_ACCEPTANCE=NO
LINK_TYPE=ld2_all_sram HAVE_CSR=YES HAVE_SVA=YES
SOC_SIM_TIME=3600 TINY_SIM_TIMEOUT=6000000 TINY_SIM_ARGS=+p7_monitor)
"${p10_make[@]}" firmware comp manifest
# Retain ELF/HEX/model identities before using the standard sim/check recipe.
"${p10_make[@]}" -o comp -o firmware sim
python3 scripts/tiny_r2_p9.py run --pdk "$p10_pdk" \
--workload VGA_YUV422 --timestamp "$P10_FOLLOWUP_STAMP" --jobs 4 \
--pixel-half-ns 500 --max-cycles 160000000 --wall-timeout 43200
done
```
P7 uses `tiny_r2_p7.py capture-source/verify-source` and snapshots of the
generated/runtime filelists. Its full acceptance needs command success,
`SIM_TEST_PASS Tiny`, `P7_LIFECYCLE_PASS`, the selected clock-profile coverage
and no forbidden marker. `P7_COLD_RESET_PASS` belongs only to the diagnostic
early-stop probe; the normal `+p7_monitor` path executes cold-reset assertions
without that marker. Never substitute the diagnostic for full acceptance.
Per-profile follow-up directories are
`build/ics55-tiny-2026-10-18-09-20-bea5da759fbb/meta/tiny-r2-p10/follow-up/`
and `build/ihp130-tiny-2026-10-18-09-20-3f1b609b0b86/meta/tiny-r2-p10/follow-up/`.
They retain preparation, dry-runs, source/tool/runtime snapshots, pre-launch
identities and original command/collection outcomes. P9 keeps its own
`meta/tiny-r2-p9/full-frame/` records and phase ID.
The P7 runs fail their stale `0x3fff` capability expectation against current
DVP-inclusive `0x7fff`; source/binary checks bind this real failure in
`p7-failure-evidence.json`. It is not a timeout or a physical timing result.
For both passing VGA runs, `vga-verification.json` corrects only the
generated wrapper's tuple/list JSON comparison, verifies all measurements
and hashes, and retains its original collection error. Do not reuse the
generated invocation wrapper unchanged for a future campaign. No successful
raw simulation is repeated to correct collection metadata, and no failed P7
simulation becomes a pass. See the [dated follow-up ledger](tiny-soc-verification.md#tiny-r2-p10-p7-and-vga-follow-up-2026-10-18)
for actual outcomes and remaining acceptance gates.
Both follow-up `report.json` files now record completed executions with
`status=incomplete` and `phase_accepted=false`: P7 fails and VGA passes for
each PDK. The VGA runs both finish at 73938869 simulator cycles; wall times
are 13598.239 seconds for ICS55 and 9269.826 seconds for IHP130. Their FIFO
high-water is four words and longest backpressure is 489 SAFE24 cycles
(20.375 us), within the 480-us no-service budget after the 16-byte margin.
These executions close the current candidate's Verilator VGA coverage only.
P7 fixture repair, deferred full Icarus/complete regression, separate quality
repairs and final physical qualification retain their existing boundaries.
## P7 capability correction
The approved subsequent correction changes only the P7 acceptance image,
its cross-source tests and these two P10 documents. Its private
`RS_P7_EXPECTED_TARGET_CAPABILITY` is exactly `0x00007FFF`, including DVP bit
14 and excluding later targets. The original strict startup comparison and
code-1 failure semantics remain. Production RTL/HAL, register ABI, dependency
versions, configuration defaults and warning/metric policy are unchanged.
Focused tests cover production/firmware parity, old or future target masks,
weakened/removed checks and missing/ambiguous definitions. The approved order
is the focused selection, software gates, Ruff, one full Pytest, selected
matrix dry-runs, then one P7 Verilator execution per PDK. The executed shared
checks are:
```bash
source .cache/retrosoc/development/tiny-r2-p1/activate.sh
python3 -m pytest -q tests/test_tiny_r2_p7.py \
-k 'target_capability or register_parity'
make CONFIG=configs/ci/ics55-tiny.mk SOC=TINY PDK=ICS55 \
sw-format-check sw-policy-check sw-host-test
ruff check .
python3 -m pytest -q
git diff --check
```
The retained runner adds fresh `--basetemp` paths and a JUnit output under
the evidence directory to the Pytest commands. It preserves the complete
command and exit status for each check. Full Pytest's existing publication
failures are compared by exact failed/error node set and missing path before
allowing the independent P7 executions; they never become a global PASS.
For this completed attempt the build timestamp is `2026-10-18-14-51`.
The P7 Make arguments and split `firmware comp manifest` / `-o comp -o firmware
sim` sequence are the same as the P7 branch of the preceding follow-up,
with the new timestamp and without its VGA command. Both PDKs retain explicit
Tiny PR/nightly dry-runs first. `tiny_r2_p7.py capture-source/verify-source`,
runtime snapshots and pre-launch hashes bind the actual binaries to the
corrected source. Do not reuse an existing variant or invoke the earlier
generated follow-up wrapper. The new `run_fix.py` is a retained one-shot
invocation record, not a general retry entrypoint.
Both P7 executions pass strict Tiny status/marker checks, full profile
coverage, DMA activity during WFI gating and exactly one warm reset. ICS55
runs profiles 2/3/0; IHP130 runs 1/0 with its configured 24-MHz external
source. Their behavioral results do not qualify physical operating points.
The [correction ledger](tiny-soc-verification.md#tiny-r2-p10-p7-capability-correction-2026-10-18)
records durations, counts, shared check outcomes and retained gaps.
Evidence is under each new P7 variant's
`meta/tiny-r2-p10/p7-capability-fix/`: ICS55 uses digest `bea5da759fbb`,
IHP130 uses `3f1b609b0b86`. The ICS55 directory also holds the shared
`validation/` and `pre-edit.json`. Final reports preserve the original failed
P7 attempts, new passing P7 executions and retained passing VGA executions
as separate records. Their status is `selected_followup_complete`, while
`phase_accepted` remains false.
VGA reuse is a separate consumed-input audit. Before editing, validate its
original source/build/launch/verdict and preserve all artifact identities.
After editing, check the exact source delta, actual GCC application sources,
unchanged shared headers/linker/build rules/metadata inputs, runtime filelists
and tool/binary identities. The only changed entry in VGA's broad input map
is the unconsumed P7 application C source. P7 tests and these documents are
outside its compilation. Keep the old execution digest; do not call the old
validator with fabricated current hashes, expand collector allowances or
overwrite previous reports. Any consumed-input change requires reassessment,
not an automatic long VGA replay. This correction performs no VGA replay.
## Quality-gate repair
This approved follow-up repairs the existing publication/Make quality gaps
without altering hardware or the passed P7 acceptance image. The publication
metadata uses the shared PSRAM model path and binds the current DVP channel
selector while preserving Mini's bulk allocation. The explicitly approved
two-file extension updates the DVP circuit's configuration packet/epoch and
applied register, plus focused tests. The historical publication SHA, document
identity, chapter structure, delivered PDFs and strict snapshot checks remain
unchanged. Source/extractor tests are not a refreshed PDF qualification.
The formatter is the locked mbake 1.4.6 with the existing `.bake.toml`.
Only one final LF is removed from each of `Makefile`,
`app/apps/ci_smoke/tiny.mk`, `rtl/mini/mk/verilator.mk` and
`rtl/mk/software.mk`; every other byte is preserved relative to the starting
worktree. `.editorconfig`'s differing final-newline setting is retained as a
separate policy issue. Never broaden this operation to all source files or
change the formatter policy to hide the original failure.
The recorded commands use the existing environment and timestamp
`2026-10-18-17-28`. This is a completed attempt; any separately approved new
execution needs a fresh variant. The focused publication selection was run
after each concrete correction, preserving its initial DVP binding failure
and the subsequent isolated-fixture dependency failure. Only one full Pytest
execution is performed, after the final focused checks pass:
```bash
source .cache/retrosoc/development/tiny-r2-p1/activate.sh
mbake format --config .bake.toml Makefile app/apps/ci_smoke/tiny.mk \
rtl/mini/mk/verilator.mk rtl/mk/software.mk
python3 -m pytest -q \
tests/test_publication_{programming,system,dev_snapshot,diagrams,full_diagrams,retrieval,v05}.py
python3 -m pytest -q tests/test_script_tools.py \
-k 'make_dry_run_and_validation_do_not_write_filelists or format_file_scope_is_tracked_and_self_owned'
python3 -m pytest -q tests/test_tiny.py -k rejects_incompatible_profiles
make CONFIG=configs/ci/ics55-tiny.mk SOC=TINY PDK=ICS55 \
format-check sw-policy-check sw-host-test
ruff check .
python3 -m pytest -q
git diff --check
```
The retained invocation records add the fixed build timestamp, build-local
Pytest `--basetemp` paths and a JUnit output. They include each command and
exit status; failed attempts stay failed. Both Tiny PDKs and the existing
Mini/IHP130 consumer retain explicit PR/nightly `scripts/regress.py --dry-run`
records with `--soc` and `--pdk`; no full matrix is started by those checks.
Capture `config` and `-n firmware` before and after the Make normalization
with the same timestamp/arguments and absent firmware outputs. Capture
`-n rtl-lint` for the Mini Verilator consumer as well. Require byte-identical
command output before executing these five firmware-only builds:
```bash
export BUILD_TIMESTAMP=2026-10-18-17-28
for pdk in ICS55 IHP130; do
quality_make=(make --no-print-directory "CONFIG=configs/ci/${pdk,,}-tiny.mk"
SOC=TINY "PDK=$pdk" "BUILD_TIMESTAMP=$BUILD_TIMESTAMP"
JOBS=4 APP=ci_smoke SIMU=VERILATOR HAVE_CSR=YES
LINK_TYPE=ld2_all_sram TINY_P8_ACCEPTANCE=NO
TINY_P9_QUICK=NO TINY_P10_ACCEPTANCE=NO)
"${quality_make[@]}" HAVE_SVA=YES TINY_P7_ACCEPTANCE=YES \
TINY_P9_ACCEPTANCE=NO firmware
"${quality_make[@]}" HAVE_SVA=NO TINY_P7_ACCEPTANCE=NO \
TINY_P9_ACCEPTANCE=YES TINY_P9_WORKLOAD=VGA_YUV422 firmware
done
make --no-print-directory CONFIG=configs/ci/ihp130.mk SOC=MINI PDK=IHP130 \
SIMU=VERILATOR APP=ci_smoke JOBS=4 \
BUILD_TIMESTAMP="$BUILD_TIMESTAMP" firmware
```
The independent firmware builds finish while the publication issue is being
resolved. Its later approved diagram/test delta is recorded separately and
does not alter compiler inputs. All four Tiny HEX images match their retained
P7/VGA images byte-for-byte. New ELF/debug identities are retained separately;
old images and simulation reports are not overwritten or relabeled. Verify
the original simulator/runtime inputs and reports before recording reuse.
No P7/VGA simulator is rebuilt or rerun for this repair.
The aggregate output is
`build/ics55-tiny-2026-10-18-17-28-bea5da759fbb/meta/tiny-r2-p10/quality-repair/`.
`approved-extension.json` records the explicit ten-file authorization;
`command-equivalence.json`, per-variant `firmware-record.json`,
`retained-evidence-audit.json` and `report.json` bind the result. The scripts
there are immutable invocation/evidence records, not generic retry commands.
The [dated ledger](tiny-soc-verification.md#tiny-r2-p10-quality-gate-repair-2026-10-18)
records the final 2031-pass/one-optional-skip result and preserves earlier
failure attribution. `quality_repair_complete` does not accept P10: complete
hardware regression, final qualification and publication/PDF readiness retain
their separate boundaries. No commit, push or phase advancement follows.
+402
View File
@@ -1,5 +1,407 @@
# Tiny MCU Verification Record
## TINY-R2-P10 quality-gate repair (2026-10-18)
The approved repair starts from `dev@5b81dea4fe0a68aabb51f42f01422068280192b2`
plus the retained P10/P7 worktree. It corrects publication metadata and tests,
normalizes exactly one final LF in each of four Make files, and appends these
two P10 documents. The maintainer explicitly extended the original eight-file
scope to ten files for the DVP circuit catalog and its tests. Production RTL,
HAL, public interfaces, profiles, dependencies, warning/metric policy and
the reviewed P7 capability correction remain unchanged. No new MISRA deviation
is introduced.
The stale PSRAM source reference predates this repair: P8 commit `f6190f91`
moved the model to `rtl/model/ESP_PSRAM64H.sv`. The publication's bulk-channel
binding also still expected the pre-P9 direct `RS_DMA_CHANNEL_BULK` call.
It now binds both the real `RS_DVP_DMA_CHANNEL` call and its Tiny/Mini
conditional definition; Mini retains bulk channel 3. Negative tests reject
a wrong call target or Mini selector without changing the HAL.
After those corrections, the first focused run reaches a further stale DVP
diagram binding. The configuration CDC now transports 128 configuration bits
plus an epoch and feeds an applied-configuration register. The approved
diagram correction records packet assembly, the 129-bit CDC path, payload
extraction and the 128-bit applied register before the core. The 42-bit payload
FIFO path remains unchanged. Directed tests reject changed CDC width,
payload slicing and bypass of the applied register. The isolated diagram
fixture now copies dependencies from the additional circuit catalog as well
as the embedded circuits; validators are not relaxed.
The execution retains each attempt rather than overwriting failed results:
| Check | Recorded result |
| --- | --- |
| Initial publication selection | 100 passed / 1 skipped / 60 errors; exposed the old DVP diagram binding |
| Diagram correction before fixture completion | 156 passed / 1 skipped / 7 failed; isolated trees lacked the register declaration source |
| Final publication selection | 163 passed / 1 skipped |
| Build-tool and Tiny configuration selections | 2 passed and 6 passed |
| Format, embedded-C policy/host tests, Ruff, final diff | PASS |
| One full Pytest execution | **2031 passed / 1 skipped**, zero failures/errors, 4854.44 s |
The sole skip remains the optional `pypdf` import. Source hashes are unchanged
during the full Pytest run. The earlier full-run 10 failures/60 errors remain
historical failures; the new run closes the current local publication/Make
quality gaps. This is not a new remote CI result.
Before/after configuration and firmware dry-run output is byte-identical for
all five build cases; the Mini Verilator lint dry-run also matches. Tiny
ICS55/IHP130 and Mini IHP130 each pass PR/nightly definition dry-runs. These
are definition checks, not executed complete hardware regressions.
| Firmware case | New variant | Build duration | Retained image comparison |
| --- | --- | --- | --- |
| Tiny ICS55 P7 | `ics55-tiny-2026-10-18-17-28-bea5da759fbb` | 4.462 s | HEX byte-identical |
| Tiny ICS55 VGA | `ics55-tiny-2026-10-18-17-28-7be4ff496b65` | 4.398 s | HEX byte-identical |
| Tiny IHP130 P7 | `ihp130-tiny-2026-10-18-17-28-3f1b609b0b86` | 4.451 s | HEX byte-identical |
| Tiny IHP130 VGA | `ihp130-tiny-2026-10-18-17-28-28a0c226bed5` | 4.523 s | HEX byte-identical |
| Mini IHP130 compatibility | `ihp130-2026-10-18-17-28-a2f660e37f72` | 6.772 s | Compilation only |
Each build succeeds without self-owned C compiler warnings and retains its
own ELF/HEX/configuration identity. No P7/VGA full-system simulation is
repeated. Directed RTL fixtures remain part of the full Pytest execution.
The separate reuse audit checks original reports, model/runtime inputs,
command equivalence, exact final-LF changes and matching loadable images.
Original simulation source digests stay attached to their original runs;
no old report or collector allowance is rewritten.
The aggregate evidence root is
`build/ics55-tiny-2026-10-18-17-28-bea5da759fbb/meta/tiny-r2-p10/quality-repair/`.
It retains `pre-edit.json`, `approved-extension.json`, source archives,
`command-equivalence.json`, `firmware-summary.json`,
`pytest-execution-source.json`, `retained-evidence-audit.json`, `report.json`
and `validation/` logs/results/JUnit. Each variant above also retains
`meta/tiny-r2-p10/quality-repair/firmware-record.json`. The
[runbook](tiny-soc-r2-system-performance.md#quality-gate-repair) records the
command matrix and ownership boundary.
The report is `quality_repair_complete` with `phase_accepted=false`.
Full long Icarus/complete supported regression and final physical/PVT/board/
sensor/frequency qualification remain open. Synthesis, netlist and STA are
not rerun for these metadata/final-LF changes. Publication identity remains
`c3de7c602a7ca0f0f9ade9d3ffb59339bc34fb8b`; PDF generation, source-baseline
refresh and visual qualification are NOT_RUN. The strict source-drift check
is preserved. `.editorconfig` still requests a final newline while the locked
mbake default removes it; this repair follows the executable gate and does
not approve a formatting-policy change. No commit, push or phase advancement
is performed.
## TINY-R2-P10 P7 capability correction (2026-10-18)
The approved follow-up repairs the stale P7 acceptance-image capability check
on `dev@5b81dea4fe0a68aabb51f42f01422068280192b2` plus the retained P10
worktree. `tiny_r2_p7.c` now requires the exact DVP-inclusive `0x00007FFF`
through an application-private constant. Production `TargetMask`, HAL,
register ABI, profiles, dependencies and quality policy are unchanged.
The architecture's `0x0003FFFF` allowed mask is not an implemented-target
expectation. No new MISRA deviation is introduced.
The added cross-source checks read the real `u_sysctrl` parameter and firmware
startup guard. They reject the old capability, unimplemented target bits,
removed/masked comparisons, and missing or ambiguous source definitions.
The focused selection passes **14 tests** (including existing register parity).
Software format/policy/host tests, Ruff and the final diff check pass.
One complete Pytest execution reports **1956 passed, 10 failed, 60 errors and
1 skipped** in 4841.86 seconds. Its 70 failure/error nodes exactly match the
previous full run and all reference the existing publication dependency on
`rtl/mini/dv/model/ESP_PSRAM64H.sv`. They remain failures; the optional `pypdf`
skip and existing Make-format issues are not repaired here. Shared validation,
JUnit results and `pytest-baseline-comparison.json` are retained under the
ICS55 evidence directory's `validation/` below.
Both PDKs pass PR/nightly dry-runs; the expansions remain identical per PDK.
Each P7 Verilator image is rebuilt in the fresh `2026-10-18-14-51` variant and
executed exactly once, without automatic retries:
| PDK | Verdict / cycles | Flow duration | Profiles | CPU gated cycles / DMA responses while gated / warm resets |
| --- | --- | --- | --- | --- |
| ICS55 | PASS / 3803591 | 1162.871 s | 2, 3, 0 | 71627 / 64 / 1 |
| IHP130 | PASS / 3799823 | 561.606 s | 1, 0 | 71634 / 64 / 1 |
Both commands and standard checkers succeed, with exactly one
`SIM_TEST_PASS Tiny`, one `P7_LIFECYCLE_PASS`, required profile coverage and
no forbidden error marker. There are no self-owned C compiler warnings.
Source, runtime/filelist and pre-launch ELF/HEX/model identities match after
execution. The normal `+p7_monitor` cold-reset assertions execute; the
diagnostic-only `P7_COLD_RESET_PASS` marker is not required. These are logical
clock/lifecycle checks, not physical frequency qualification. CPU/main-SRAM
SYS and divided XPI MEM retain their existing distinct meanings.
New evidence directories are:
- `build/ics55-tiny-2026-10-18-14-51-bea5da759fbb/meta/tiny-r2-p10/p7-capability-fix/`.
- `build/ihp130-tiny-2026-10-18-14-51-3f1b609b0b86/meta/tiny-r2-p10/p7-capability-fix/`.
Each retains `p7-record.json`, `source-before.json`, `runtime-before.json`,
`launch-identity.json`, command logs/results, `vga-reuse-audit.json` and
`report.json`. The shared `pre-edit.json` verifies both original VGA executions
against the actual source before this correction and records the original
compiler commands, binaries, logs, source archives and tool identities.
The new audit proves the subsequent P7 C edit is not consumed by the VGA build
and that its runtime/generated inputs are unchanged. Test/documentation
changes are recorded separately. Original VGA execution digests and
measurements remain attached to their original binaries; no simulation is
repeated and no collector whitelist or old report is rewritten.
This closes the selected P7 Verilator gap and retains the two passed VGA
executions. Reports use `selected_followup_complete` with
`phase_accepted=false`. The failed 09:20 P7 attempts below remain real failures
on their original source. Full long Icarus/complete supported regression,
separate publication/Make-format repairs and final physical/PVT/board/sensor
qualification remain open. No synthesis, netlist, STA or physical flow is
rerun for this acceptance-image correction; earlier evidence retains its
original attribution. No commit, push or phase advancement is performed.
## TINY-R2-P10 P7 and VGA follow-up (2026-10-18)
The maintainer approved one P7 Verilator lifecycle execution and one full
VGA/YUV422 execution per PDK, preserving the existing P10 candidate based on
`5b81dea4fe0a68aabb51f42f01422068280192b2`. Only this ledger and the P10
runbook are edited; no RTL, firmware, HAL, profile, dependency or quality-policy
input is changed. New evidence uses timestamp `2026-10-18-09-20`; the
2026-10-17 reports below keep their original identities and scope.
Both Tiny PR/nightly dry-runs pass and expand to identical commands per PDK.
This is matrix-definition evidence, not an executed complete regression.
The original P7/P9 producer phase IDs remain in their records; P10 consumes
these follow-up results without accepting another phase.
| PDK | P7 lifecycle image | Full VGA/YUV422 image |
| --- | --- | --- |
| ICS55 | FAIL, firmware code 1, simulator exit 1, 361.667 s | PASS, 13598.239 s, 73938869 cycles |
| IHP130 | FAIL, firmware code 1, simulator exit 1, 268.512 s | PASS, 9269.826 s, 73938869 cycles |
The P7 failure is a stale acceptance-image expectation. The firmware at
`app/apps/ci_smoke/tiny_r2_p7.c:133` requires `target_capability == 0x3fff`.
The DVP-inclusive integration sets `TargetMask=0x7fff` in
`rtl/tiny/top/retrosoc_tiny.sv`; `tiny_sysctrl.sv` returns that mask at
TARGET_CAP and `crt/src/hal/rcu.c` copies it into the snapshot. The retained
firmware disassembly still compares against `0x3fff`. Both simulations report
`SIM_TEST_FAIL code=1` before any `P7_CLOCK_COMMIT`, so current-revision clock
transition, WFI/DMA gating and warm-reset coverage remain unclosed.
This mismatch is the first established blocker; the later lifecycle checks
were not reached and need a fresh approved run after the fixture repair.
Git attribution identifies the old expectation in
`bc48cec74a8f3cec731c4853ac0380f9ae32c35b` and the DVP-inclusive mask in
`8f5630fb41257098b30153eeb50248bb63ebfb94`. Both predate this P10 follow-up.
The RTL capability must not be reduced to satisfy the stale test. Fixing the
acceptance image and adding a hardware/firmware capability-consistency check
requires the next approved implementation scope; no such fix or retry is
performed here. Historical P7 acceptance remains attributed to its old source.
P7 source and pre-launch binary identities were checked again after failure.
Its raw build/simulation logs, command results and causal source/commit chain
are bound by `p7-failure-evidence.json` under each follow-up directory:
- `build/ics55-tiny-2026-10-18-09-20-bea5da759fbb/meta/tiny-r2-p10/follow-up/`.
- `build/ihp130-tiny-2026-10-18-09-20-3f1b609b0b86/meta/tiny-r2-p10/follow-up/`.
Fresh VGA evidence is under
`build/ics55-tiny-2026-10-18-09-20-7be4ff496b65/meta/tiny-r2-p9/full-frame/`
and `build/ihp130-tiny-2026-10-18-09-20-28a0c226bed5/meta/tiny-r2-p9/full-frame/`.
Both profiles verify the 640x480 YUV422 frame, all 614400 payload bytes, 153600 DMA
words, 307200 pixels and guards, followed by the 7x3 RGB565 PIO crop with
42 valid/48 stored bytes. Total accepted/delivered FIFO words are 153612,
including the twelve PIO words. FIFO high-water is four words and the longest
observed backpressure is 489 SAFE24 cycles (20.375 us). Reserving 16 bytes
leaves a 480-us no-service budget at the exercised 1-MHz PIXCLK. The original
P9 runner, simulator and strict marker checker pass for each profile, with
exit zero, exactly one `SIM_TEST_PASS Tiny` and no forbidden error marker.
This closes the fresh full-system VGA/YUV422 Verilator gap for this candidate;
it is finite behavioral evidence, not a qualified camera FPS or physical rate.
The generated invocation wrapper compared a parser tuple with the JSON list
representation and recorded a false VGA collection failure. Supplemental
`vga-verification.json` checks exact JSON-normalized equality, the original
source/build/model/firmware identities, zero self-owned compiler warnings and
the strict Tiny verdict. It preserves the original collection error and does
not rerun simulation. An independent diagnostic-only `P7_COLD_RESET_PASS`
requirement in that wrapper was not reached by the real P7 failures; it must
not be used to convert their code-1 results into passes.
Both follow-up directories contain `report.json` with `status=incomplete`,
`executions_complete=true` and `phase_accepted=false`, because P7 fails.
All four simulator executions are complete, exactly once per selected case
and PDK. The source and pre-launch binary identities remain unchanged.
Full Icarus/complete regression stays deferred; the publication/Make-format
failures below still need separate repair approval. Physical/PVT/board/sensor
and qualified frequency claims remain final-product obligations. No phase,
commit or push is advanced by this follow-up.
## TINY-R2-P10 approved implementation campaign (2026-10-17)
The maintainer approved the P10 implementation plan from clean
`5b81dea4fe0a68aabb51f42f01422068280192b2`. The selected campaign completes
the executable performance/application work while keeping complete P10
acceptance pending final regression. Full long Icarus firmware stays deferred
to final Tiny qualification. This instruction does not rewrite prior P9
human-acceptance records, historical evidence or the frozen specification.
The [P10 runbook](tiny-soc-r2-system-performance.md) defines the exact workload,
ownership, measured endpoints, single-execution policy and evidence paths.
Default ICS55/PLL-present and IHP130/no-PLL compatibility retain SAFE24.
No production RTL, shared SDK ABI, dependency, warning baseline or metrics
policy change is introduced. The approved implementation and selected
performance/application/backend campaign are complete. Complete P10 acceptance
remains pending final regression and human review; no subsequent phase is
advanced by these results.
The first P10 focused campaign passes 19 new tests and 286 existing
P1/P3/P4/P5/P6/P9 tests (592.46 seconds for the latter), plus C formatting,
policy/host tests, Ruff, RTL format/style/readiness, Mini IHP130 firmware and
explicit Tiny ICS55/IHP130 PR/nightly plus Mini IHP130 PR dry-runs. Evidence is
under `build/ics55-tiny-2026-10-17-15-56-ff4b5cef6eb5/meta/tiny-r2-p10/validation/`.
The four pre-existing Make-format differences remain. Initial focused setup
and observer compiler failures were corrected before measurement; their
retained attempts do not replace the successful corrected test reports.
The matched stage passes one execution per retained image: ICS55 flat and
banked under variant `ics55-tiny-2026-10-17-15-56-a0ea4d0cd125`, and IHP130 P1
under `ihp130-tiny-2026-10-17-15-56-bcf62053a831`. Each records the original
image separately from the current RTL source and verifies complete readback,
guards and strict Tiny terminal verdicts. The observed cycle comparisons are:
| Matched image / case | Reference cycles | P10 cycles |
| --- | ---: | ---: |
| ICS55 P3 flat / CPU | 73911 | 73911 |
| ICS55 P3 flat / memory | 102568 | 102568 |
| ICS55 P3 flat / DMA16 | 16974 | 22829 |
| ICS55 P3 banked / memory | 86214 | 86214 |
| ICS55 P3 banked / DMA16 | 15802 | 22805 |
| IHP130 P1 / memory | 754159 | 639438 |
| IHP130 P1 / DMA16 | 71444 | 89513 |
The ICS55 reference is P5's execution of the identical P3 images; IHP130 uses
the repaired P1 reference. This is whole-platform evolution, not attribution
to an isolated CPU/fabric optimization. The cases include regressions and no
predetermined speedup gate. The remaining selected stages are recorded below;
the complete supported regression remains unclosed.
The one full Pytest execution completes in 5031.91 seconds with **1937 passed,
10 failed, 60 errors and 1 skipped**. All failures/fixture errors are existing
publication consumers of `rtl/mini/dv/model/ESP_PSRAM64H.sv`; the actual shared
model remains at `rtl/model/ESP_PSRAM64H.sv`. Publication sources were not
changed. This is not a global CI PASS. IHP130 ordinary acceptance plus P10
audio observations passes under `ihp130-tiny-2026-10-17-15-56-83113a53b401`:
both 256-frame audio formats and four WS frames pass, with longest WS wait
3219 PCLK cycles (budget 4800), FIFO peak 15 and complete expected recovery.
The two windows observe 2479/7565 cycles of simultaneous issues to multiple
SRAM groups; DMA R/W beat overlap in these windows is zero and remains zero
in the report. Firmware text is 42764 bytes, BSS 10128 and flat-SRAM space
above BSS is 78388 bytes; this is headroom, not a measured worst-case stack.
ICS55 ordinary acceptance plus audio observations also passes under
`ics55-tiny-2026-10-17-15-56-f3e42d54c18b`, in 3730.267 seconds. Its WS maximum
is 3220 PCLK cycles, FIFO peak 15, and the two measured bank-overlap windows
are 2460/7520 cycles. Both PDKs retain 57 direct-background jobs in the 16-bit
case and 39 finite-chain jobs in the 24-bit case; these finite service windows
are not fixed-work architectural speedup comparisons.
IHP130's P10 backend completes under
`ihp130-tiny-2026-10-17-15-56-8232fa11e7f3`. Boot passes at 36069 cycles
(641.742 seconds), compact DVP at 175649 cycles (3074.530 seconds). The
structural audit reports 32 main, six Crypto and zero PLL macros. STA command
execution succeeds but setup WNS/TNS remain -284.47/-11105854.00 ns and hold
WNS/TNS -0.49/-141.45 ns. Standalone warnings retain exit 2; metrics remain
observe-mode PASS. No timing closure or physical qualification follows.
The ICS55 software stage completes the other six P3 images once on the same
compiled model as the matched stage, under
`ics55-tiny-2026-10-17-15-56-a0ea4d0cd125/meta/tiny-r2-p10/software/`.
All eight images retain their original HEX/ELF/compiler/layout identities.
The following current-model cycles are software comparisons, separate from
the same-image architectural comparisons above:
| P3 image | CPU | CPU copy | DMA16 | Contention |
| --- | ---: | ---: | ---: | ---: |
| COMPAT Os flat | 98586 | 135381 | 25301 | 401857 |
| TINY_PERF O2 flat | 73911 | 102568 | 22829 | 301181 |
| TINY_PERF O2 LTO flat | 73919 | 98504 | 21098 | 299414 |
| TINY_PERF O3 flat | 73911 | 102568 | 22550 | 300906 |
| TINY_PERF O3 LTO flat | 73919 | 98504 | 21098 | 299414 |
| TINY_PERF Os flat | 73979 | 110779 | 24056 | 302472 |
| TINY_PERF Os LTO flat | 73979 | 110776 | 21045 | 299773 |
| TINY_PERF O2 banked | 73914 | 86214 | 22805 | 300933 |
Compiler/profile defaults are not changed based on this table. Raw instruction,
bank, wait, descriptor, stack and payload records remain in each stage record.
ICS55's backend also completes under
`ics55-tiny-2026-10-17-15-56-ff4b5cef6eb5`: compact DVP passes at 177541 cycles
in 8887.787 seconds. Synthesis reports 476025 cells and 2711070.264704
Liberty-based area. Setup WNS/TNS are -163.87/-6193132.50 ns and hold WNS/TNS
-0.31/-45.71 ns; warnings retain exit 2 and metrics remain observational.
This was the first execution of each selected long workload, not a repeat
campaign. IHP130 reports 501378 cells and 14883898.734641 Liberty-based area.
After those frozen-source runs completed, the collector/test-only correction
accounts separately for SDIO descriptor fetches and completion writebacks.
Twenty-five focused checks pass, and both retained backend bundles revalidate
with exactly those two permitted source differences. Original records and
source snapshots are unchanged. The camera campaign uses fresh
`2026-10-17-21-20` variants and passes once per PDK. ICS55 completes in
6966.317 seconds under `ics55-tiny-2026-10-17-21-20-b6ad86f0a86e`; IHP130
completes in 5002.673 seconds under `ihp130-tiny-2026-10-17-21-20-1cb7ba9e3e49`.
Both command exits are zero, contain exactly one `SIM_TEST_PASS Tiny` at
34778540 cycles and contain no forbidden error marker. These are new P10
application results, separate from historical P9 capture and P6 SDIO evidence.
Both PDKs produce identical five-phase measurements at SAFE24:
| Camera pipeline phase | Calls | Bytes | SYS cycles | Retired instructions |
| --- | ---: | ---: | ---: | ---: |
| DVP-to-PSRAM capture | 1 | 153600 | 7311485 | 1409737 |
| CPU full comparison and histogram/checksum | 1 | 153600 | 10060974 | 2140840 |
| PSRAM-to-SRAM bounce copy | 150 | 153600 | 4016550 | 388950 |
| SDIO two-sector writes | 150 | 153600 | 1686150 | 402150 |
| SDIO readback and full comparison | 150 | 153600 | 6824100 | 1667850 |
The 76800-pixel histogram and checksum `2323003269` match the independent
oracle. All 300 sectors and buffer guards pass. Raw SDIO AXI totals are
158400 read bytes and 154800 write bytes: each direction carries 153600 pixel
bytes, plus 4800 descriptor-read and 1200 status-writeback bytes respectively.
The camera FIFO accepts and delivers 38400 words, peaks at one word and has
zero observed backpressure. With the reserved 16-byte margin, the measured
occupancy leaves a 492-us no-service budget at the exercised 1-MHz PIXCLK.
This finite capture-then-save workflow does not establish continuous FPS.
The camera windows observe 200482 cycles with simultaneous issues to multiple
SRAM groups, at most two active targets, zero DMA R/W beat-overlap cycles and
zero bus response errors. Maximum completed read/write latencies are CPU
77/18 SYS cycles and SDIO 253/254; central DMA has no AXI reads in this stream
capture and a maximum write latency of 126 cycles. Initial/final pending
transactions remain in the raw observations; these are measured maxima, not
universal service guarantees. GNU `size` reports text/data/BSS of
22264/136/2768 bytes and 106096 bytes above BSS for both camera images; that
space is not a measured worst-case stack.
The final source-checked reports are:
- ICS55: `build/ics55-tiny-2026-10-17-21-20-ff4b5cef6eb5/meta/tiny-r2-p10/report/report.json`.
- IHP130: `build/ihp130-tiny-2026-10-17-21-20-8232fa11e7f3/meta/tiny-r2-p10/report/report.json`.
Both report `selected_gates_complete`, with `phase_accepted=false`. Old-stage
execution digests are preserved with exactly the two collector/test changes
listed as later validation differences; each camera's source delta is empty.
Shared C/Python/style/Mini validation is indexed by the ICS55 report and the
validation directory above, and is not repeated in the IHP130 profile report.
Exact stage commands, tool/image/model/input digests and terminal logs remain
in the referenced records. No source was changed during a long execution, and
no selected long workload was automatically repeated.
Remaining acceptance obligations are unchanged: complete PR/nightly (including
the deferred full Icarus firmware and P7 clock-transition matrix), fresh
full-system VGA coverage, physical/PVT/board/sensor and higher-frequency
qualification. The full Pytest publication failures above and existing Make
format differences in `Makefile`, `app/apps/ci_smoke/tiny.mk`,
`rtl/mini/mk/verilator.mk` and `rtl/mk/software.mk` remain explicit quality gaps.
Negative STA and warning deltas remain observations under the unchanged
policy. No new MISRA Required-rule deviation is introduced; the mechanical
checks do not establish complete MISRA certification. Human review and the
final regression closure are required before complete P10 acceptance.
## TINY-R2-P7 human acceptance and P8 implementation authorization (2026-10-15)
The maintainer explicitly confirmed P7 human acceptance and authorized the
+6
View File
@@ -100,6 +100,12 @@ NSS1 initialization and CPU/DMA mapped-data verification through a shared
pin-level PSRAM model. It preserves SRAM-only boot and does not integrate DVP.
The verification ledger owns phase acceptance and remaining qualification gaps.
The [P10 campaign](../../docs/ip/tiny-soc-r2-system-performance.md) adds
source-bound single-execution performance replays and a separate QVGA
capture/CPU-statistics/SDIO-save image. Passive testbench observers supplement
the existing counters without changing production RTL or public interfaces.
Full regression and final physical qualification remain explicit obligations.
The separately approved [SPI extension](../../docs/ip/spi.md) adds SPI0 to the
future standard Tiny product, with its own `SPI-P0` through `SPI-P5` phases.
It is a PCLK master-only 8/16-bit controller with separate 8 x 32-bit TX/RX