fix: fix inout wire port connect

This commit is contained in:
maksyuki committed 2025-08-12 15:44:36 +08:00
1 parent c2bc3a488f
commit e6c7d67537
1 file changed
+3 -3
+3 -3
View File
@@ -36,7 +36,7 @@ module retrosoc_tb;
wire s_rst_n;
wire [4:0] s_core_mdd_sel;
wire [4:0] s_ip_mdd_sel;
wire s_pll_en;
wire s_clk_bypass;
wire [2:0] s_pll_cfg;
wire s_uart_tx;
@@ -71,7 +71,7 @@ module retrosoc_tb;
assign s_rst_n = r_rst_n;
assign s_core_mdd_sel = r_core_mdd_sel;
assign s_ip_mdd_sel = r_ip_mdd_sel;
assign s_pll_en = r_pll_en;
assign s_clk_bypass = ~r_pll_en;
assign s_pll_cfg = r_pll_cfg;
retrosoc_asic u_retrosoc_asic (
@@ -111,7 +111,7 @@ module retrosoc_tb;
.pll_cfg_0_i_pad (s_pll_cfg[0]),
.pll_cfg_1_i_pad (s_pll_cfg[1]),
.pll_cfg_2_i_pad (s_pll_cfg[2]),
.clk_bypass_i_pad (~s_pll_en),
.clk_bypass_i_pad (s_clk_bypass),
.ext_rst_n_i_pad (s_rst_n),
.sys_clkdiv4_o_pad (),
.uart_tx_o_pad (s_uart_tx),