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https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
feat: modify cmd psram rd/wr test oper
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@@ -20,8 +20,8 @@
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#include <tinylib.h>
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#define RAM_TOTAL 0x20000 // 128 KB
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#define PSRAM_NUM 4
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#define CPU_FREQ 72 // unit: MHz
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#define PSRAM_NUM 1
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#define CPU_FREQ 64 // unit: MHz
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#define UART_BPS 115200 // unit: bps
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@@ -148,53 +148,64 @@ char getchar_prompt(char *prompt)
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void cmd_memtest(uint32_t addr, uint32_t range)
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{
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int cyc_count = 5;
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int stride = 256;
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uint32_t state;
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// int cyc_count = 5;
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// int stride = 256;
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// uint32_t state;
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volatile uint32_t *base_word = (uint32_t *)addr;
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volatile uint8_t *base_byte = (uint8_t *)addr;
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// volatile uint8_t *base_byte = (uint8_t *)addr;
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printf("[memtest] addr: 0x%x range: %x\n", addr, range);
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// printf("[memtest] addr: 0x%x range: %x\n", addr, range);
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// walk in stride increments, word access
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for (int i = 1; i <= cyc_count; i++)
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{
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state = i;
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for (int word = 0; word < range / sizeof(int); word += stride)
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{
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*(base_word + word) = xorshift32(&state);
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}
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// for (int i = 1; i <= cyc_count; i++)
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// {
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// state = i;
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// for (int word = 0; word < range / sizeof(int); word += stride)
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// {
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// *(base_word + word) = xorshift32(&state);
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// }
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state = i;
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for (int word = 0; word < range / sizeof(int); word += stride)
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{
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if (*(base_word + word) != xorshift32(&state))
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{
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printf("***FAILED BYTE*** at %x\n", 4 * word);
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return;
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}
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}
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printf(".");
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}
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printf("stride test done\n");
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// Byte access
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// state = i;
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// for (int word = 0; word < range / sizeof(int); word += stride)
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// {
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// if (*(base_word + word) != xorshift32(&state))
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// {
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// printf("***FAILED BYTE*** at %x\n", 4 * word);
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// while(1);
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// return;
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// }
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// }
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// printf(".");
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// }
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// printf("stride test done\n");
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// // Byte access
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for (int byte = 0; byte < range; byte++)
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{
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*(base_byte + byte) = (uint8_t)byte;
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// for (int byte = 0; byte < range; byte++)
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// {
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// *(base_byte + byte) = (uint8_t)byte;
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// }
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// printf("byte write done\n");
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// for (int byte = 0; byte < range; byte++)
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// {
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// if (*(base_byte + byte) != (uint8_t)byte)
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// {
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// printf("***FAILED BYTE*** at %x\n", byte);
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// while(1);
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// return;
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// }
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// }
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for(int i = 0; i < 16; ++i) {
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*(base_word + i) = i;
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}
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printf("byte write done\n");
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for (int byte = 0; byte < range; byte++)
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{
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if (*(base_byte + byte) != (uint8_t)byte)
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{
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printf("***FAILED BYTE*** at %x\n", byte);
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return;
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}
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// uint32_t tmp_val;
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for(int i = 0; i < 16; ++i) {
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printf("tmp_val: %d\n", *(base_word + i));
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}
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printf("\nmemtest passed\n");
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// printf("\nmemtest passed\n");
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}
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uint32_t cmd_benchmark(bool verbose, uint32_t *instns_p)
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@@ -1058,52 +1069,57 @@ void welcome_screen()
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printf("first bootloader done\n");
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printf("uart config: 8n1 %dbps\n", UART_BPS);
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printf("app booting...\n");
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printf("\n");
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printf(" _ _____ _____ \n");
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printf(" | | / ____| / ____|\n");
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printf(" _ __ ___| |_ _ __ ___| (___ ___ | | \n");
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printf(" | '__/ _ \\ __| '__/ _ \\\\___ \\ / _ \\| |\n");
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printf(" | | | __/ |_| | | (_) |___) | (_) | |____ \n");
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printf(" |_| \\___|\\__|_| \\___/_____/ \\___/ \\_____|\n");
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printf(" retroSoC: A Customized ASIC for Retro Stuff!\n");
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printf(" <https://github.com/retroSoC/retroSoC>\n");
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printf(" author: MrAMS(init version) <https://github.com/MrAMS>\n");
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printf(" maksyuki <https://github.com/maksyuki>\n");
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printf(" License: MulanPSL-2.0 license\n");
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printf(" version: v1.0(commit: 73b7f30)\n");
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printf("\n");
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// printf("\n");
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// printf(" _ _____ _____ \n");
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// printf(" | | / ____| / ____|\n");
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// printf(" _ __ ___| |_ _ __ ___| (___ ___ | | \n");
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// printf(" | '__/ _ \\ __| '__/ _ \\\\___ \\ / _ \\| |\n");
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// printf(" | | | __/ |_| | | (_) |___) | (_) | |____ \n");
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// printf(" |_| \\___|\\__|_| \\___/_____/ \\___/ \\_____|\n");
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// printf(" retroSoC: A Customized ASIC for Retro Stuff!\n");
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// printf(" <https://github.com/retroSoC/retroSoC>\n");
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// printf(" author: MrAMS(init version) <https://github.com/MrAMS>\n");
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// printf(" maksyuki <https://github.com/maksyuki>\n");
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// printf(" License: MulanPSL-2.0 license\n");
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// printf(" version: v1.0(commit: 73b7f30)\n");
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// printf("\n");
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printf("Processor:\n");
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printf(" CORE: picorv32\n");
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printf(" ISA: rv32imac\n");
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printf(" FREQ: %dMHz\n\n", CPU_FREQ);
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// printf("Processor:\n");
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// printf(" CORE: picorv32\n");
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// printf(" ISA: rv32imac\n");
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// printf(" FREQ: %dMHz\n\n", CPU_FREQ);
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printf("Inst/Memory Device: \n");
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printf(" SPI Flash size: 16MB\n");
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printf(" On-board RAM size: %dKB\n", RAM_TOTAL / 1024);
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printf(" Extern PSRAM size: %dMB(%dx8MB)\n\n", 8 * PSRAM_NUM, PSRAM_NUM);
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// printf("Inst/Memory Device: \n");
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// printf(" SPI Flash size: 16MB\n");
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// printf(" On-board RAM size: %dKB\n", RAM_TOTAL / 1024);
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// printf(" Extern PSRAM size: %dMB(%dx8MB)\n\n", 8 * PSRAM_NUM, PSRAM_NUM);
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printf("Memory Map IO Device:\n");
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printf(" 1 x QSPFS\n");
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printf(" 16 x GPIO\n");
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printf(" 1 x HOUSEKEEPING SPI\n");
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printf(" 1 x UART\n");
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printf(" 2 x TIMER\n");
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printf(" 1 x RNG\n");
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printf(" 1 x ARCHINFO\n");
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printf(" 1 x UART(HP)\n");
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printf(" 4 x PWM\n");
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printf(" 1 x PS2\n");
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printf(" 1 x QSPI\n");
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printf(" 1 x I2C\n");
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printf(" 1 x PSRAM(4x8MB)\n");
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printf(" 1 x SPFS(TPO)\n\n");
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// printf("Memory Map IO Device:\n");
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// printf(" 1 x QSPFS\n");
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// printf(" 16 x GPIO\n");
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// printf(" 1 x HOUSEKEEPING SPI\n");
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// printf(" 1 x UART\n");
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// printf(" 2 x TIMER\n");
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// printf(" 1 x RNG\n");
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// printf(" 1 x ARCHINFO\n");
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// printf(" 1 x UART(HP)\n");
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// printf(" 4 x PWM\n");
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// printf(" 1 x PS2\n");
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// printf(" 1 x QSPI\n");
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// printf(" 1 x I2C\n");
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// printf(" 1 x PSRAM(%dx8MB)\n", PSRAM_NUM);
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// printf(" 1 x SPFS(TPO)\n\n");
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printf("self test start...\n");
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// cmd_read_flash_id();
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cmd_read_flash_regs();
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cmd_print_spi_state();
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// cmd_read_flash_regs();
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// cmd_print_spi_state();
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printf("[exterm psram test]\n");
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printf("[psram wait cycle]: %d\n", reg_psram_waitcycl);
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reg_psram_waitcycl = (uint32_t)12;
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printf("[psram wait cycle]: %d\n", reg_psram_waitcycl);
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// cmd_memtest(0x04000000, 8 * 1024); // test extern psram
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cmd_memtest(0x04000000, 8 * 512); // test extern psram
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while(1);
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printf("self test done\n");
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}
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@@ -42,6 +42,8 @@
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#define reg_timer1_config (*(volatile uint32_t*)0x03000068)
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#define reg_timer1_value (*(volatile uint32_t*)0x0300006c)
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#define reg_timer1_data (*(volatile uint32_t*)0x03000070)
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// psram
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#define reg_psram_waitcycl (*(volatile uint32_t*)0x03000080)
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// cust archinfo
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#define reg_cust_archinfo_sys (*(volatile uint32_t*)0x03001000)
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#define reg_cust_archinfo_idl (*(volatile uint32_t*)0x03001004)
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