- Introduced PWM V2 alternate functions in the documentation, detailing the GPIO mappings and fault handling.
- Updated the filelist to include new PWM RTL files for the PWM V2 implementation.
- Modified the SOC topology JSON to reflect new GPIO alternate functions for PWM, including synchronization and capture inputs.
- Updated software makefile to include PWM source and header files.
- Enhanced the APB wrapper to integrate the PWM module with proper parameters.
- Updated the ASIC top-level module to include new GPIO mappings for PWM functionality.
- Added tests to validate the new GPIO and PWM connections in the topology.
- Updated file lists to include new watchdog RTL files in clusterip.
- Replaced async_reqack source in commonip file list with top-level CDC file.
- Modified clock and reset domain configurations to incorporate watchdog reset signals.
- Updated the SoC topology generation script and JSON to reflect changes in watchdog interrupt handling.
- Added watchdog source files to software makefile for compilation.
- Enhanced APB wrapper to connect watchdog reset request signal.
- Updated RCU module to handle watchdog reset requests.
- Modified testbench to validate watchdog reset functionality.
- Updated test cases to reflect changes in interrupt naming conventions for the watchdog.
- Updated filelist to replace old CRC models with new core and register files.
- Added source file for CRC implementation in software.mk.
- Included new CRC header files in the include paths for compilation.
- Introduced signal in sysctrl interface and module to handle RTC wake events.
- Added RTC wake status register in memory map and updated related tests.
- Integrated RTC wake handling in the APB wrapper and core wrapper.
- Enhanced clock and reset domain configurations to include RTC signals.
- Updated software build configurations to include RTC source files and headers.
- Modified formal verification and testbench files to accommodate RTC wake functionality.
- Ensured proper synchronization and status recording for RTC wake events in the sysctrl module.
- Updated the PS2 interface in the APB wrapper to include RX and TX FIFO depths.
- Replaced the kdb_model with ps2_device_model in the testbench for better PS2 handling.
- Added new PS2 source files and headers for keyboard and mouse functionality.
- Refactored GPIO alternate functions to support PS2 clock and data signals.
- Implemented PS2 decoder tests for keyboard and mouse in the runtime tests.
- Updated the software makefile to include new PS2 source files and headers.
- Modified the topology tests to validate PS2 GPIO assignments.
- Updated Makefile to include a check for the RNG metadata script and added a dependency for it.
- Modified memory_map.json to change the user access level of APB_RNG to 'none'.
- Updated clusterip filelist to include new RNG source files.
- Adjusted generate_soc_topology.py to replace the reserved IRQ with the RNG IRQ.
- Updated soc_topology.json to reflect the new RNG interrupt configuration.
- Added RNG source files to software.mk for compilation.
- Enhanced ip_apb_wrapper.sv to instantiate the RNG core and connect it to the APB interface.
- Updated test_memory_map.py to ensure SOC_ADDR_IS_APB_RNG is not defined.
- Modified test_script_tools.py to ensure dry runs do not write filelists.
- Updated test_soc_topology.py to verify the new RNG IRQ and adjust the user IRQ mask.
- Introduced scripts and makefile targets for generating architecture information metadata.
- Updated the filelist generation to include archinfo metadata files.
- Modified software.mk to include archinfo source files and headers.
- Enhanced the ip_apb_wrapper and user_ip_wrapper to integrate archinfo components.
- Updated tests to ensure stability and correct path expansions for generated files.
- Removed unnecessary files from the clusterip filelist.
maksyuki