mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
e6b9a9f43d
- Introduced for deterministic corpus framing, CRC checks, and regression evidence for NPU-P6. - Added to validate NPU-P6 reference execution. - Created a new RTL model for gate-level NPU transactions. - Updated to instantiate and streamline the testbench. - Enhanced with capability checks and added NPU-P6 reference contract tests. - Modified to include in the source list and refactor rejection logic. - Updated README.md to document new test scripts and their purposes.
429 lines
15 KiB
Python
429 lines
15 KiB
Python
#!/usr/bin/env python3
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"""Run the isolated NPU IHP130 synthesis and 72 MHz STA flow (P1/P3 modules)."""
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from __future__ import annotations
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import argparse
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import glob
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import json
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import re
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import subprocess
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import sys
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from datetime import datetime, timezone
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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sys.path.insert(0, str(ROOT))
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SYNTH_TCL = ROOT / "physical/smoke/syn/yosys/script/synth.tcl"
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STA_TCL = ROOT / "physical/smoke/sta/opensta/npu_p1.tcl"
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STA_SDC = ROOT / "physical/smoke/sta/opensta/npu_p1.sdc"
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RUN_FLOW = ROOT / "scripts/run_flow.py"
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PDK_ROOT = ROOT / "physical/pdk/IHP-Open-PDK/ihp-sg13g2/libs.ref"
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STA_LIBERTY = PDK_ROOT / "sg13g2_stdcell/lib/sg13g2_stdcell_slow_1p08V_125C.lib"
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STA_LINK_LIB = PDK_ROOT / "sg13g2_io/lib/sg13g2_io_slow_1p08V_3p0V_125C.lib"
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TOPS = (
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"npu_local_sram",
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"npu_patch_packer",
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"npu_mac_array",
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"npu_accumulator",
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"npu_vector",
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"npu_requantizer",
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"npu_dma",
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"npu_job_decoder",
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"npu_scheduler",
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"npu_core",
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"apb4_npu",
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"npu_block_top",
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)
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NPU_RTL = (
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"npu_pkg.sv",
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"npu_local_sram.sv",
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"npu_patch_packer.sv",
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"npu_mac_array.sv",
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"npu_accumulator.sv",
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"npu_vector.sv",
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"npu_requantizer.sv",
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"npu_dma.sv",
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"npu_job_decoder.sv",
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"npu_scheduler.sv",
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"npu_reg.sv",
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"npu_control_cdc.sv",
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"npu_core.sv",
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"apb4_npu.sv",
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)
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# Tops whose only non-logic port is an AXI4 master interface get a generated
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# synthesis wrapper in the build tree (never tracked): the interface is
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# instantiated inside the wrapper so the DUT has no unconnected ports.
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INTERFACE_WRAPPED = {
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"npu_dma": """
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module npu_dma_synth_top (
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input logic clk_hp_i,
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input logic rst_hp_n_i,
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input logic clear_i,
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input logic block_new_i,
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output logic pause_ack_o,
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input logic read_req_valid_i,
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output logic read_req_ready_o,
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input logic [31:0] read_addr_i,
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input logic [31:0] read_bytes_i,
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output logic read_data_valid_o,
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input logic read_data_ready_i,
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output logic [63:0] read_data_o,
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output logic [ 7:0] read_keep_o,
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output logic read_last_o,
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input logic write_req_valid_i,
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output logic write_req_ready_o,
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input logic [31:0] write_addr_i,
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input logic [31:0] write_bytes_i,
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input logic write_data_valid_i,
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output logic write_data_ready_o,
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input logic [63:0] write_data_i,
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input logic [ 7:0] write_keep_i,
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input logic write_last_i,
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output logic write_done_o,
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output logic busy_o,
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output logic read_busy_o,
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output logic write_busy_o,
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output logic [63:0] read_bytes_o,
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output logic [63:0] write_bytes_o,
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output logic [63:0] stall_cycles_o,
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output logic fault_o,
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output logic [ 3:0] fault_code_o,
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output logic [31:0] fault_addr_o,
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output logic [ 1:0] fault_resp_o,
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output logic read_cmd_err_o,
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output logic write_cmd_err_o
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);
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axi4_if #(
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.ADDR_WIDTH(32),
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.DATA_WIDTH(64),
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.ID_WIDTH (3),
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.USER_WIDTH(1)
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) u_axi4 (
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.aclk (clk_hp_i),
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.aresetn(rst_hp_n_i)
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);
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npu_dma u_dut (
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.clk_hp_i (clk_hp_i),
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.rst_hp_n_i (rst_hp_n_i),
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.clear_i (clear_i),
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.block_new_i (block_new_i),
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.pause_ack_o (pause_ack_o),
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.read_req_valid_i (read_req_valid_i),
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.read_req_ready_o (read_req_ready_o),
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.read_addr_i (read_addr_i),
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.read_bytes_i (read_bytes_i),
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.read_data_valid_o (read_data_valid_o),
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.read_data_ready_i (read_data_ready_i),
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.read_data_o (read_data_o),
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.read_keep_o (read_keep_o),
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.read_last_o (read_last_o),
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.write_req_valid_i (write_req_valid_i),
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.write_req_ready_o (write_req_ready_o),
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.write_addr_i (write_addr_i),
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.write_bytes_i (write_bytes_i),
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.write_data_valid_i(write_data_valid_i),
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.write_data_ready_o(write_data_ready_o),
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.write_data_i (write_data_i),
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.write_keep_i (write_keep_i),
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.write_last_i (write_last_i),
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.write_done_o (write_done_o),
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.busy_o (busy_o),
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.read_busy_o (read_busy_o),
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.write_busy_o (write_busy_o),
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.read_bytes_o (read_bytes_o),
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.write_bytes_o (write_bytes_o),
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.stall_cycles_o (stall_cycles_o),
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.fault_o (fault_o),
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.fault_code_o (fault_code_o),
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.fault_addr_o (fault_addr_o),
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.fault_resp_o (fault_resp_o),
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.read_cmd_err_o (read_cmd_err_o),
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.write_cmd_err_o (write_cmd_err_o),
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.axi4 (u_axi4)
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);
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endmodule
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""",
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"apb4_npu": """
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module apb4_npu_synth_top (
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input logic clk_i,
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input logic rst_n_i,
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input logic clk_hp_i,
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input logic rst_hp_n_i,
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input logic [1:0] resource_owner_i,
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input logic resource_owner_lock_i,
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input logic resource_quiesce_i,
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input logic resource_reset_i,
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output logic idle_o,
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output logic block_ack_o,
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output logic irq_o,
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input logic hp_block_new_i,
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output logic hp_pause_ack_o,
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input logic hp_flush_i,
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output logic hp_flush_busy_o,
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output logic hp_idle_o
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);
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apb4_if u_apb4 (.pclk(clk_i), .presetn(rst_n_i));
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axi4_if #(
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.ADDR_WIDTH(32),
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.DATA_WIDTH(64),
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.ID_WIDTH (3),
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.USER_WIDTH(1)
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) u_npu_axi4 (
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.aclk (clk_hp_i),
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.aresetn(rst_hp_n_i)
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);
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apb4_npu u_dut (
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.clk_i (clk_i),
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.rst_n_i (rst_n_i),
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.clk_hp_i (clk_hp_i),
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.rst_hp_n_i (rst_hp_n_i),
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.resource_owner_i (resource_owner_i),
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.resource_owner_lock_i(resource_owner_lock_i),
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.resource_quiesce_i (resource_quiesce_i),
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.resource_reset_i (resource_reset_i),
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.apb4 (u_apb4),
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.idle_o (idle_o),
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.block_ack_o (block_ack_o),
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.irq_o (irq_o),
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.hp_block_new_i (hp_block_new_i),
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.hp_pause_ack_o (hp_pause_ack_o),
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.hp_flush_i (hp_flush_i),
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.hp_flush_busy_o (hp_flush_busy_o),
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.hp_idle_o (hp_idle_o),
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.npu_axi4 (u_npu_axi4)
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);
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endmodule
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""",
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}
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SRAM_MACRO = "RM_IHPSG13_1P_1024x32_c2_bm_bist"
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EXPECTED_SRAM_MACROS = 16
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TARGET_PERIOD_PS = 13889
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VIOLATED = re.compile(r"VIOLATED")
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LATCH = re.compile(r"\$dlatch|latch", re.IGNORECASE)
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def _run_flow(tool: str, log: Path, result: Path, env: dict[str, str], command: list[str]) -> None:
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log.parent.mkdir(parents=True, exist_ok=True)
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args = [sys.executable, str(RUN_FLOW), "--tool", tool, "--log", str(log), "--result", str(result)]
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for name, value in env.items():
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args += ["--env", f"{name}={value}"]
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args += ["--", *command]
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completed = subprocess.run(args, cwd=ROOT)
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if completed.returncode != 0:
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raise RuntimeError(f"{tool} flow failed for {env.get('TOP_DESIGN', env.get('OPENSTA_TOP'))}: {log}")
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def _synth_top(top: str) -> str:
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return f"{top}_synth_top" if top in INTERFACE_WRAPPED else top
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def _write_filelist(path: Path) -> None:
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lines = [
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"+define+PDK_IHP130",
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"+define+HAVE_SRAM_MACRO",
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"+define+SYNTHESIS",
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"+define+SV_ASSRT_DISABLE",
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f"+incdir+{ROOT / 'rtl/ip/multimedia'}",
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f"+incdir+{ROOT / 'rtl/managed/clusterip/common/rtl'}",
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]
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for name in NPU_RTL:
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source = ROOT / "rtl/ip/multimedia" / name
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if not source.is_file():
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raise RuntimeError(f"missing NPU RTL source: {source}")
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lines.append(str(source))
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lines.append(str(ROOT / "physical/smoke/syn/yosys/npu_block_top.sv"))
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common_rtl = ROOT / "rtl/managed/clusterip/common/rtl"
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lines.append(str(ROOT / "rtl/tech/tc_sram.sv"))
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for extra in (
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"interface/apb4_if.sv",
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"interface/axi4_if.sv",
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"utils/register.sv",
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"utils/xchecker.sv",
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"utils/fifo.sv",
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"clkrst/rst_sync.sv",
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"cdc/cdc_sync.sv",
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"cdc/cdc_rst_ctrlr.sv",
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"cdc/async_reqack.sv",
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):
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source = common_rtl / extra
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if not source.is_file():
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raise RuntimeError(f"missing Common source: {source}")
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lines.append(str(source))
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path.parent.mkdir(parents=True, exist_ok=True)
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for top, wrapper in INTERFACE_WRAPPED.items():
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wrapper_path = path.parent / f"{_synth_top(top)}.sv"
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wrapper_path.write_text(wrapper, encoding="utf-8")
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lines.append(str(wrapper_path))
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path.write_text("\n".join(lines) + "\n", encoding="utf-8")
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def _synth(top: str, build_root: Path, filelist: Path) -> dict[str, object]:
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base = build_root / "syn/yosys-npu" / top
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synth_top = _synth_top(top)
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for sub in ("out", "tmp", "rpt"):
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(base / sub).mkdir(parents=True, exist_ok=True)
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env = {
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"PDK": "IHP130",
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"SOC": "MINI",
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"SYNTH_RECIPE": "balanced",
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"HAVE_SRAM_MACRO": "YES",
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"SRAM_SIZE_KIB": "32",
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"YOSYS_TARGET_PERIOD_PS": str(TARGET_PERIOD_PS),
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"SV_FLIST": str(filelist),
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"TOP_DESIGN": synth_top,
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"PROJ_NAME": synth_top,
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"BUILD": str(base / "out"),
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"WORK": str(base / "tmp"),
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"REPORTS": str(base / "rpt"),
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"NETLIST": str(base / "out" / f"{synth_top}_yosys.v"),
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"CONFIG": str(base / "out" / f"{synth_top}_yosys.config"),
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}
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log = build_root / "syn/yosys-npu" / f"{top}.log"
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_run_flow("yosys", log, base / "result-synth.json", env, ["yosys", "-c", str(SYNTH_TCL)])
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area = json.loads((base / "rpt" / f"{synth_top}_area.json").read_text(encoding="utf-8"))
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design = area["design"]
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macro_count = design.get("num_cells_by_type", {}).get(SRAM_MACRO, 0)
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latch_cells = {
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name: count
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for name, count in design.get("num_cells_by_type", {}).items()
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if "dlatch" in name.lower() or "latch" in name.lower()
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}
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log_text = log.read_text(encoding="utf-8", errors="replace")
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latch_lines = [
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line
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for line in log_text.splitlines()
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if LATCH.search(line) and "PROC_DLATCH pass" not in line
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]
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return {
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"top": top,
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"area_um2": design.get("area"),
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"num_cells": design.get("num_cells"),
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"sram_macro_count": macro_count,
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"latch_cells": latch_cells,
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"latch_log_lines": latch_lines[:10],
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"log": str(log),
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"netlist": env["NETLIST"],
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}
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def _sta(top: str, build_root: Path, netlist: Path) -> dict[str, object]:
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base = build_root / "sta/opensta-npu" / top
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base.mkdir(parents=True, exist_ok=True)
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sram_libs = sorted(
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glob.glob(str(PDK_ROOT / "sg13g2_sram/lib/*_slow_1p08V_125C.lib"))
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)
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env = {
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"OPENSTA_NETLIST": str(netlist),
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"OPENSTA_LIBERTY": str(STA_LIBERTY),
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"OPENSTA_LINK_LIBS": str(STA_LINK_LIB),
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"OPENSTA_SRAM_LIBS": " ".join(sram_libs),
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"OPENSTA_SDC": str(STA_SDC),
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"OPENSTA_REPORT": str(base / f"{top}_checks.rpt"),
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"OPENSTA_METRICS": str(base / f"{top}_timing_metrics.rpt"),
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"OPENSTA_TOP": _synth_top(top),
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}
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log = base / f"{top}.log"
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_run_flow("opensta", log, base / "result-sta.json", env, ["sta", "-no_init", "-exit", str(STA_TCL)])
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metrics = {}
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for line in (base / f"{top}_timing_metrics.rpt").read_text(encoding="utf-8").splitlines():
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name, _, value = line.partition("=")
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metrics[name] = float(value)
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checks = (base / f"{top}_checks.rpt").read_text(encoding="utf-8", errors="replace")
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return {
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"top": top,
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"wns_setup_ns": metrics.get("wns_max"),
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"tns_setup_ns": metrics.get("tns_max"),
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"setup_paths": metrics.get("paths_max"),
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"wns_hold_ns": metrics.get("wns_min"),
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"tns_hold_ns": metrics.get("tns_min"),
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"hold_paths": metrics.get("paths_min"),
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"violated_paths": len(VIOLATED.findall(checks)),
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"log": str(log),
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}
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def _tool_version(command: list[str]) -> str:
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completed = subprocess.run(command, capture_output=True, text=True)
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return (completed.stdout or completed.stderr).splitlines()[0].strip()
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def main() -> int:
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parser = argparse.ArgumentParser(description=__doc__)
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parser.add_argument("--build-root", type=Path, default=ROOT / "build/npu-p1-flow")
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parser.add_argument("--top", action="append", choices=TOPS, help="limit to one top module")
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parser.add_argument("--synth", action="store_true")
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parser.add_argument("--sta", action="store_true")
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parser.add_argument("--evidence", type=Path, help="evidence JSON output path")
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args = parser.parse_args()
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if not args.synth and not args.sta:
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args.synth = args.sta = True
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tops = tuple(args.top) if args.top else TOPS
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build_root = args.build_root.resolve()
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filelist = build_root / "npu_p1.fl"
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_write_filelist(filelist)
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evidence: dict[str, object] = {
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"phase": "NPU-P1",
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"verification_ids": ["NPU-V017"],
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"generated_at": datetime.now(timezone.utc).isoformat(),
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"git_revision": subprocess.check_output(
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["git", "-C", str(ROOT), "rev-parse", "HEAD"], text=True
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).strip(),
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"tools": {
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"yosys": _tool_version(["yosys", "--version"]),
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"opensta": _tool_version(["sta", "-version"]),
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},
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"target_period_ps": TARGET_PERIOD_PS,
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"filelist": str(filelist),
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"tops": {},
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"failures": [],
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}
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failures: list[str] = evidence["failures"]
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for top in tops:
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record: dict[str, object] = {}
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if args.synth:
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record["synth"] = _synth(top, build_root, filelist)
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synth = record["synth"]
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if top == "npu_local_sram" and synth["sram_macro_count"] != EXPECTED_SRAM_MACROS:
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failures.append(
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f"npu_local_sram maps {synth['sram_macro_count']} {SRAM_MACRO}, "
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f"expected {EXPECTED_SRAM_MACROS}"
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)
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if synth["latch_log_lines"] or synth["latch_cells"]:
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failures.append(
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f"{top} synthesis shows latches: {synth['latch_log_lines']} {synth['latch_cells']}"
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)
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netlist = build_root / "syn/yosys-npu" / top / "out" / f"{_synth_top(top)}_yosys.v"
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if args.sta:
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if not netlist.is_file():
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raise RuntimeError(f"missing netlist for {top}: {netlist}; run --synth first")
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record["sta"] = _sta(top, build_root, netlist)
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sta = record["sta"]
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if not (sta["wns_setup_ns"] >= 0.0):
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failures.append(f"{top} setup WNS {sta['wns_setup_ns']} ns < 0")
|
|
if not (sta["tns_setup_ns"] == 0.0):
|
|
failures.append(f"{top} setup TNS {sta['tns_setup_ns']} ns != 0")
|
|
if sta["violated_paths"]:
|
|
failures.append(f"{top} has {sta['violated_paths']} violating paths")
|
|
if not sta["setup_paths"]:
|
|
failures.append(f"{top} has no constrained setup paths (vacuous STA)")
|
|
evidence["tops"][top] = record
|
|
|
|
evidence["verdict"] = "PASS" if not failures else "FAIL"
|
|
payload = json.dumps(evidence, indent=2, sort_keys=True) + "\n"
|
|
evidence_path = args.evidence or (build_root / "evidence-p1.json")
|
|
evidence_path.parent.mkdir(parents=True, exist_ok=True)
|
|
evidence_path.write_text(payload, encoding="utf-8")
|
|
print(payload, end="")
|
|
return 0 if not failures else 1
|
|
|
|
|
|
if __name__ == "__main__":
|
|
raise SystemExit(main())
|