mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
0e36b6a82f
- Added build_hp_rtthread.py for building the RT-Thread kernel with RV64 support. - Updated build_hp_smoke.py to target RV64 architecture and modified output filenames. - Modified generate_vexiiriscv.py to reflect RV64 configuration and memory management. - Created hp_tools.py for shared utilities related to RV64 builds. - Enhanced package_hp_boot.py to package RV64 workloads and updated versioning. - Implemented run_hp_sim.py for executing and validating HP workloads with specific markers. - Developed setup_hp_rtthread.py for installing RT-Thread source and environment setup. - Updated GenerateRetroSocHp.scala to generate RV64 application cores. - Enhanced tests for HP boot bundles, platform specifications, and tool utilities to accommodate RV64 changes. - Adjusted test cases to validate new workload types and ensure compatibility with RV64 architecture.
89 lines
4.7 KiB
Markdown
89 lines
4.7 KiB
Markdown
# Third-party attribution
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The optional HP RT-Thread kernel is official RT-Thread v5.3.0, commit
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`99428a1e7f7447955aa860f7c969273a12095b8f`, from
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[RT-Thread/rt-thread](https://github.com/RT-Thread/rt-thread). It is licensed
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under Apache-2.0. Its original copyright/license files remain in the locked
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managed checkout; only the retroSoC BSP is repository-owned. Redistribution of
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built RT-Thread images must retain the applicable upstream notices.
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This repository contains RTL source files that retain copyright and attribution information from third-party open-source projects in their original file headers. The following projects are explicitly referenced in the RTL sources currently present in this repository.
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## 1. ETH Zurich and University of Bologna
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Several RTL files retain the original copyright notice from ETH Zurich and University of Bologna, including files under the following paths:
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- rtl/managed/clusterip/**
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- rtl/managed/mpw/core/username7/ibex/**
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- rtl/tech/tc_clk.sv
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- rtl/ip/memory/opipsram_phy.sv
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- rtl/ip/memory/opipsram_trx.sv
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- rtl/tech/tc_opipsram_delay.sv
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The `tc_clk.sv` header and the adapted OPI PSRAM PHY files state the
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Solderpad Hardware License, Version 0.51 (`SHL-0.51`). The OPI PSRAM PHY
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files are adapted from PULP Platform HyperBus v0.0.4 at commit
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`80de8df600edc5d7956a94c9d42f911d6e61efd7`; each preserves the source-file
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authors and records retroSoC's modifications. The exact license text is in
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[`licenses/PULP_Platform-SHL-0.51`](licenses/PULP_Platform-SHL-0.51).
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## 2. Ravenna / PicoRV32 in ASIC
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The following RTL files retain the original header from the Ravenna example SoC project, which refers to a design using PicoRV32 in ASIC:
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- rtl/ip/peripheral/gpio.sv
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- rtl/ip/peripheral/timer.sv
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- rtl/ip/serial/uart.sv
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The preserved notice attributes the work to Clifford Wolf and Tim Edwards.
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## 3. Hirosh Dabui
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The SDRAM controller implementation in rtl/ip/memory/sdram_core.sv retains the original copyright notice attributed to Hirosh Dabui.
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## 4. EmbedFire
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Several SPI SD card related RTL files retain the original attribution to EmbedFire and refer to source files such as sd_init.v, sd_write.v, sd_read.v, and data_rw_ctrl.v:
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- rtl/ip/storage/spisd_core.sv
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- rtl/ip/storage/spisd_data.sv
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- rtl/ip/storage/spisd_init.sv
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- rtl/ip/storage/spisd_read.sv
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- rtl/ip/storage/spisd_write.sv
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These headers state that the original code was published on GitHub by EmbedFire, but that the original license was not specified in the retained header.
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## 5. Device simulation models
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The simulation-only models under `rtl/model/` retain their upstream notices
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and source formatting. The AT24 model is imported from the retroSoC I2C
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repository, the microphone model from the retroSoC I2S repository, and the
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W25Q128JVxIM model from the retroSoC SPI repository. The Winbond model retains
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its original Winbond Electronics Corporation copyright and "All Rights
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Reserved" notice; its inclusion does not relicense it under Mulan PSL v2.
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## 6. Notes on redistribution
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The optional checksum-locked SKY130 SRAM artifact is generated with OpenRAM at
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the revision recorded in its manifest. OpenRAM is distributed under the BSD
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3-Clause License; the SkyWater-provided SRAM build-space used by the generator
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is distributed under Apache License 2.0. The artifact retains both exact
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license texts and is materialized only below the ignored `.cache/` tree.
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The preserved third-party notices are included to maintain attribution for code that was adapted or reused in this repository. They do not replace the repository's main license declaration. The retroSoC project itself is distributed under the Mulan PSL v2 license.
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## 7. Typst publication diagram packages
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The manual publication builder uses these checksum-locked third-party packages.
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Their original sources and notices remain in the verified package caches.
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| Package | Authors | License | Original text |
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| --- | --- | --- | --- |
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| bytefield 0.0.8 | Jomaway <https://github.com/jomaway> | MIT | [Exact license](licenses/Typst-bytefield-0.0.8-LICENSE) |
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| rivet 0.3.1 | Louis Heredero <https://git.kb28.ch/HEL> | Apache-2.0 | [Exact license](licenses/Typst-rivet-0.3.1-LICENSE) |
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| blockcell 0.1.0 | @daleione | MIT | [Exact license](licenses/Typst-blockcell-0.1.0-LICENSE) |
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| circuiteria 0.2.1 | Louis Heredero <https://git.kb28.ch/HEL> | Apache-2.0 | [Exact license](licenses/Typst-circuiteria-0.2.1-LICENSE) |
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| cetz 0.3.4 | Johannes Wolf <https://github.com/johannes-wolf>; fenjalien <https://github.com/fenjalien> | LGPL-3.0-or-later | [Exact license](licenses/Typst-cetz-0.3.4-LICENSE) |
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| tidy 0.3.0 | Mc-Zen <https://github.com/Mc-Zen> | MIT | [Exact license](licenses/Typst-tidy-0.3.0-LICENSE) |
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| oxifmt 0.2.1 | PgBiel <https://github.com/PgBiel> | MIT-0 | [Exact license](licenses/Typst-oxifmt-0.2.1-LICENSE) |
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