mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
maksyuki
c0f04067b2
- Updated multiple RTL files in the and directories to include licensing information under the Mulan PSL v2. - Added attribution comments for contributions from ETH Zurich and University of Bologna in . - Enhanced test files in the directory with licensing details and ensured compliance with the Solderpad Hardware License, Version 0.51. - Introduced a new test in to verify the preservation of attribution for PULP HyperBus sources.
39 lines
1.2 KiB
Systemverilog
39 lines
1.2 KiB
Systemverilog
// Copyright (c) 2026 Yuchi Miao <miaoyuchi@ict.ac.cn>
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// retroSoC is licensed under Mulan PSL v2.
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// You can use this software according to the terms and conditions of the Mulan PSL v2.
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// You may obtain a copy of Mulan PSL v2 at:
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// http://license.coscl.org.cn/MulanPSL2
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// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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// EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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// MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
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// See the Mulan PSL v2 for more details.
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module SRAM_4096X32_M8_BW (
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input logic [11:0] A,
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input logic [31:0] D,
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input logic CEB,
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input logic CLK,
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input logic GWEB,
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input logic [31:0] WEB,
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input logic MARE,
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input logic [ 3:0] MAR,
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output logic [31:0] Q
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);
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logic [31:0] s_memory[0:4095];
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always_ff @(posedge CLK) begin
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if (!CEB) begin
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if (!GWEB) begin
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for (int bit_index = 0; bit_index < 32; bit_index++) begin
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if (!WEB[bit_index]) begin
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s_memory[A][bit_index] <= D[bit_index];
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end
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end
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end else begin
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Q <= s_memory[A];
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end
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end
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end
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endmodule
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