mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
- Introduced a new USB2 transaction engine testbench to validate the functionality of the USB2 transaction engine. - Updated clock and reset domain tests to include USB2 ULPI crossings. - Enhanced memory map tests to verify USB2 base addresses and performance offsets. - Modified pin map tests to ensure USB2 ULPI pins are correctly generated. - Updated SOC topology tests to account for USB2 peripherals and IRQ mappings. - Added static timing analysis constraints for USB2 clock domains. - Created dedicated USB2 tests for various components including packet RAM, descriptor validation, and transaction engine. - Implemented a register parity test to ensure ABI consistency between RTL and C header definitions.
116 lines
4.4 KiB
Systemverilog
116 lines
4.4 KiB
Systemverilog
`timescale 1ns / 1ps
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module usb2_link_domain_tb;
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logic clk_i = 1'b0;
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logic rst_n_i = 1'b0;
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logic enable_i = 1'b0;
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logic fill_cmd_valid_i = 1'b1;
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logic drain_cmd_valid_i = 1'b1;
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logic [ 7:0][31:0] endpoint_cfg_i = '0;
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logic work_ready_o;
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logic result_valid_o;
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logic [63:0] result_data_o;
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logic setup_valid_o;
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logic [63:0] setup_data_o;
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logic fill_cmd_ready_o;
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logic fill_stream_ready_o;
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logic drain_cmd_ready_o;
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logic drain_stream_valid_o;
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logic [36:0] drain_stream_data_o;
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logic buffer_event_valid_o;
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logic [ 2:0] buffer_event_data_o;
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logic viewport_ready_o;
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logic viewport_resp_valid_o;
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logic [ 8:0] viewport_resp_data_o;
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logic [ 1:0] line_state_o;
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logic [ 1:0] vbus_state_o;
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logic id_ground_o;
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logic link_ready_o;
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logic [13:0] frame_o;
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logic transaction_busy_o;
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logic retry_o;
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logic protocol_error_o;
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logic [31:0] ecc_corrected_count_o;
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logic [31:0] ecc_uncorrectable_count_o;
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usb2_ulpi_if ulpi ();
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always #5 clk_i = ~clk_i;
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assign ulpi.data_di_i = 8'd0;
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assign ulpi.dir_i = 1'b0;
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assign ulpi.nxt_i = 1'b1;
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usb2_link_domain u_dut (
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.clk_i (clk_i),
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.rst_n_i (rst_n_i),
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.enable_i (enable_i),
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.phy_reset_n_i (1'b1),
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.high_speed_i (1'b1),
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.active_role_i (usb2_pkg::Usb2RoleIdle),
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.device_addr_i (7'd0),
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.endpoint_cfg_i (endpoint_cfg_i),
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.timeout_i (32'd1000),
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.work_valid_i (1'b0),
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.work_ready_o (work_ready_o),
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.work_data_i ('0),
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.result_valid_o (result_valid_o),
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.result_ready_i (1'b1),
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.result_data_o (result_data_o),
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.setup_valid_o (setup_valid_o),
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.setup_ready_i (1'b1),
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.setup_data_o (setup_data_o),
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.fill_cmd_valid_i (fill_cmd_valid_i),
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.fill_cmd_ready_o (fill_cmd_ready_o),
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.fill_cmd_data_i ('0),
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.fill_stream_valid_i (1'b0),
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.fill_stream_ready_o (fill_stream_ready_o),
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.fill_stream_data_i ('0),
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.drain_cmd_valid_i (drain_cmd_valid_i),
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.drain_cmd_ready_o (drain_cmd_ready_o),
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.drain_cmd_data_i ('0),
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.drain_stream_valid_o (drain_stream_valid_o),
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.drain_stream_ready_i (1'b1),
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.drain_stream_data_o (drain_stream_data_o),
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.buffer_event_valid_o (buffer_event_valid_o),
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.buffer_event_ready_i (1'b1),
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.buffer_event_data_o (buffer_event_data_o),
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.viewport_valid_i (1'b0),
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.viewport_ready_o (viewport_ready_o),
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.viewport_data_i ('0),
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.viewport_resp_valid_o (viewport_resp_valid_o),
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.viewport_resp_ready_i (1'b1),
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.viewport_resp_data_o (viewport_resp_data_o),
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.line_state_o (line_state_o),
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.vbus_state_o (vbus_state_o),
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.id_ground_o (id_ground_o),
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.link_ready_o (link_ready_o),
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.frame_o (frame_o),
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.transaction_busy_o (transaction_busy_o),
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.retry_o (retry_o),
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.protocol_error_o (protocol_error_o),
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.ecc_corrected_count_o (ecc_corrected_count_o),
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.ecc_uncorrectable_count_o(ecc_uncorrectable_count_o),
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.ulpi (ulpi)
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);
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initial begin
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repeat (4) @(posedge clk_i);
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rst_n_i = 1'b1;
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repeat (4) @(posedge clk_i);
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if (fill_cmd_ready_o || drain_cmd_ready_o || transaction_busy_o) begin
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$fatal(1, "USB2 disabled packet-store isolation failed");
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end
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fill_cmd_valid_i = 1'b0;
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drain_cmd_valid_i = 1'b0;
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enable_i = 1'b1;
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repeat (8) @(posedge clk_i);
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if (!link_ready_o || !ulpi.reset_n_o || ulpi.data_oe_o || ulpi.stp_o ||
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transaction_busy_o || result_valid_o || setup_valid_o || protocol_error_o ||
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(ecc_corrected_count_o != 32'd0) || (ecc_uncorrectable_count_o != 32'd0)) begin
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$fatal(1, "USB2 link domain idle smoke failed");
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end
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$display("USB2 link domain smoke passed");
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$finish;
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end
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endmodule
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