Files
retroSoC/configs
maksyuki 6cff6102a4 feat: add management debug reset and JTAG integration for Hazard3
- Implemented  module to handle debug reset requests, ensuring proper synchronization with the AHB-Lite bridge.
- Created  to integrate JTAG-DTM and Debug Module, facilitating abstract command exposure.
- Updated  and  modules to include JTAG interface signals.
- Enhanced the development environment with scripts for running debug sessions using OpenOCD and GDB.
- Added tests for management debug reset functionality and JTAG integration, ensuring correct behavior under various scenarios.
- Updated SDC generation to include JTAG clock domain and port requirements.
- Modified various scripts to support new debug features and ensure compatibility with the Hazard3 architecture.
2026-08-05 22:30:11 +08:00
..

Reproducible Build Profiles

This directory contains committed Make configuration profiles. Each profile selects SoC, PDK, ISA, CSR support, application, linker layout, and the supported validation tier. The user-extension fabric is fixed; the management core defaults to HAZARD3 and may be set to PICORV32 with CORE.

ci/ contains pull-request profiles, cluster/ contains configurations requiring site tools or PDKs, and benchmark/ contains fixed-workload baseline profiles. The nightly workflow reuses the IHP130 CI profile. Start builds from a committed profile rather than setting an unreviewed mix of variables on the command line.

PDK_BEHAV=YES selects technology-wrapper functional models for behavioral simulation. It is a simulation-only setting, participates in the build variant key, and is invalid with Yosys synthesis. Profiles that execute from an SRAM macro must select either this mode or a qualified macro timing model.

For supported profiles and commands, see the root README and agent contract.