mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
- Introduced a new USB2 transaction engine testbench to validate the functionality of the USB2 transaction engine. - Updated clock and reset domain tests to include USB2 ULPI crossings. - Enhanced memory map tests to verify USB2 base addresses and performance offsets. - Modified pin map tests to ensure USB2 ULPI pins are correctly generated. - Updated SOC topology tests to account for USB2 peripherals and IRQ mappings. - Added static timing analysis constraints for USB2 clock domains. - Created dedicated USB2 tests for various components including packet RAM, descriptor validation, and transaction engine. - Implemented a register parity test to ensure ABI consistency between RTL and C header definitions.
439 lines
19 KiB
Python
439 lines
19 KiB
Python
"""Tests for the generated Mini SoC internal integration bindings."""
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from __future__ import annotations
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import json
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import shutil
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import subprocess
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import sys
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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TOPOLOGY = ROOT / "rtl/mini/integration/soc_topology.json"
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GENERATOR = ROOT / "rtl/mini/integration/generate_soc_topology.py"
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MEMORY_MAP = ROOT / "rtl/mini/address_map/memory_map.json"
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MEMORY_MAP_GENERATOR = ROOT / "rtl/mini/address_map/generate_memory_map.py"
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def generate(output_dir: Path) -> None:
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subprocess.run(
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[
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sys.executable,
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str(GENERATOR),
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"--map",
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str(TOPOLOGY),
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"--memory-map",
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str(MEMORY_MAP),
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"--output-dir",
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str(output_dir),
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],
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check=True,
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)
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def validate(topology: Path) -> subprocess.CompletedProcess[str]:
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return subprocess.run(
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[
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sys.executable,
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str(GENERATOR),
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"--map",
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str(topology),
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"--memory-map",
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str(MEMORY_MAP),
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"--check",
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],
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text=True,
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capture_output=True,
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)
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def write_invalid_topology(tmp_path: Path, document: dict[str, object]) -> Path:
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path = tmp_path / "invalid_topology.json"
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path.write_text(json.dumps(document), encoding="utf-8")
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return path
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def test_topology_generates_complete_rib_apb_and_gpio_bindings(tmp_path: Path) -> None:
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generate(tmp_path)
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interfaces = (tmp_path / "rtl/apb4_periph_interfaces.svh").read_text(encoding="utf-8")
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routes = (tmp_path / "rtl/apb4_periph_select_routes.svh").read_text(encoding="utf-8")
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gpio = (tmp_path / "rtl/soc_gpio_alt_bindings.svh").read_text(encoding="utf-8")
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apb_interfaces = (tmp_path / "rtl/apb4_system_interfaces.svh").read_text(encoding="utf-8")
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apb_declarations = (tmp_path / "rtl/apb4_system_declarations.svh").read_text(encoding="utf-8")
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apb_routes = (tmp_path / "rtl/apb4_system_request_routes.svh").read_text(encoding="utf-8")
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apb_response = (tmp_path / "rtl/apb4_system_response_mux.svh").read_text(encoding="utf-8")
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fabric = (tmp_path / "rtl/soc_fabric_interfaces.svh").read_text(encoding="utf-8")
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bus_fabric = (tmp_path / "rtl/soc_bus_fabric.svh").read_text(encoding="utf-8")
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apb_system_fabric = (tmp_path / "rtl/apb4_system_fabric.svh").read_text(encoding="utf-8")
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apb_periph_fabric = (tmp_path / "rtl/apb4_periph_fabric.svh").read_text(encoding="utf-8")
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irq_config = (tmp_path / "rtl/soc_irq_config.svh").read_text(encoding="utf-8")
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rib_irq = (tmp_path / "rtl/apb4_periph_irq_bindings.svh").read_text(encoding="utf-8")
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apb_irq = (tmp_path / "rtl/apb4_system_irq_bindings.svh").read_text(encoding="utf-8")
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irq_wiring = (tmp_path / "rtl/soc_irq_wiring.svh").read_text(encoding="utf-8")
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irq_sva = (tmp_path / "rtl/soc_irq_sva.svh").read_text(encoding="utf-8")
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filelist = (tmp_path / "soc_topology.fl").read_text(encoding="utf-8")
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assert interfaces.count("apb4_if u_") == 20
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assert "nmi_if" not in interfaces
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assert "soc_nmi" not in interfaces
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assert "assign s_psel_comb[17] = `SOC_ADDR_IS_APB4_I2C1(s_decode_addr);" in routes
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assert "assign s_psel_comb[1] = `SOC_ADDR_IS_APB4_GPIO(s_decode_addr) || `SOC_ADDR_IS_APB4_GPIO_ADMIN(s_decode_addr);" in routes
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assert "SOC_ADDR_FLASH" not in routes
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assert "assign s_psel_comb[15] = `SOC_ADDR_IS_APB4_SDIO0(s_decode_addr);" in routes
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assert "assign s_psel_comb[16] = `SOC_ADDR_IS_APB4_OPIPSRAM(s_decode_addr);" in routes
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assert "assign s_psel_comb[18] = `SOC_ADDR_IS_APB4_SDIO1(s_decode_addr);" in routes
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assert "assign s_psel_comb[19] = `SOC_ADDR_IS_APB4_CRYPTO(s_decode_addr);" in routes
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assert "assign s_psel_comb[20] = `SOC_ADDR_IS_APB4_USB2(s_decode_addr);" in routes
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assert gpio.count("// GPIO") == 64
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assert "u_uart1_if" not in gpio
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assert "assign u_uart0_if.cts_n_i = u_gpio_if.di_i[0];" in gpio
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assert "assign u_gpio_if.alt0_do_i[0] = 1'b0;" in gpio
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assert "assign u_gpio_if.alt0_oe_i[0] = 1'b0;" in gpio
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assert "assign u_gpio_if.alt0_do_i[1] = u_uart0_if.rts_n_o;" in gpio
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assert "assign u_gpio_if.alt0_oe_i[1] = 1'b1;" in gpio
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assert "assign u_gpio_if.alt0_do_i[15] = u_sdio0_if.sck_o;" in gpio
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assert "assign u_sdio0_if.cmd_di_i = u_gpio_if.di_i[16];" in gpio
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assert "assign u_gpio_if.alt1_do_i[0] = u_ps2_if.ps2_clk_o;" in gpio
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assert "assign u_gpio_if.alt1_oe_i[0] = u_ps2_if.ps2_clk_oe_o;" in gpio
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assert "assign u_gpio_if.alt1_do_i[1] = u_ps2_if.ps2_dat_o;" in gpio
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assert "assign u_gpio_if.alt1_oe_i[1] = u_ps2_if.ps2_dat_oe_o;" in gpio
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assert "assign u_gpio_if.alt1_do_i[2] = u_ws2812_if.dat_o;" in gpio
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assert "assign u_pwm_if.sync_i = u_gpio_if.di_i[2];" in gpio
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assert "assign u_gpio_if.alt0_do_i[3] = u_pwm_if.pwm_o[0];" in gpio
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assert "assign u_gpio_if.alt0_oe_i[3] = u_pwm_if.oe_o[0];" in gpio
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assert "assign u_pwm_if.fault_i = u_gpio_if.di_i[9];" in gpio
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assert "assign u_pwm_if.capture_i[0] = u_gpio_if.di_i[30];" in gpio
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assert "assign u_pwm_if.capture_i[1] = u_gpio_if.di_i[31];" in gpio
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assert "assign u_gpio_if.alt1_do_i[22] = u_psram_if.nss_o[0];" in gpio
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assert "assign u_gpio_if.alt0_do_i[21] = u_opipsram_if.ck_o;" in gpio
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assert "assign u_gpio_if.alt0_do_i[22] = u_opipsram_if.cs_n_o;" in gpio
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assert "assign u_opipsram_if.dq_i[6] = u_gpio_if.di_i[29];" in gpio
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assert "assign u_gpio_if.alt0_oe_i[29] = u_opipsram_if.dq_oe_o[6];" in gpio
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assert "assign u_opipsram_if.rwds_i = u_gpio_if.di_i[31];" in gpio
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assert "assign u_gpio_if.alt0_do_i[31] = u_opipsram_if.rwds_o;" in gpio
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assert "s_tmr_capch" not in gpio
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assert apb_interfaces.count("apb4_if u_") == 8
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assert "apb4_pure_if u_archinfo_apb4_pure_if ();" in apb_interfaces
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assert "assign user_ip.paddr = s_addr_q;" in apb_routes
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assert "({32{s_psel_q[7]}} & user_ip.prdata)" in apb_response
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assert "localparam int NSLV = 8;" in apb_declarations
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assert fabric.count("axi4_if #(") == 8
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assert ".mgmt_axi4(u_mgmt_axi4_if)" in bus_fabric
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assert ".user_axi4(u_user_axi4_if)" in bus_fabric
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assert ".dma_axi4(u_dma_axi4_if)" in bus_fabric
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assert ".sdio0_axi4(u_sdio0_axi4_if)" in bus_fabric
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assert ".sdio1_axi4(u_sdio1_axi4_if)" in bus_fabric
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assert ".usb2_axi4(u_usb2_axi4_if)" in bus_fabric
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assert ".cfg_axi4(u_cfg_axi4_if)" in bus_fabric
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assert ".system_axi4(u_system_axi4_if)" in bus_fabric
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assert ".axi4(u_system_axi4_if)" in apb_system_fabric
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assert ".usb2_axi4(u_usb2_axi4_if)" in apb_periph_fabric
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assert "`define SOC_IRQ_VECTOR_WIDTH 32" in irq_config
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assert "`define SOC_USER_IRQ_MASK 32'h004EFBFC" in irq_config
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assert "`define SOC_IRQ_APB4_PERIPH_WIDTH 20" in irq_config
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assert "`define SOC_IRQ_APB4_SYSTEM_WIDTH 5" in irq_config
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assert "assign irq_o[0] = u_clint_if.software_irq_o[0];" in rib_irq
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assert "assign irq_o[10] = ws2812.irq_o;" in rib_irq
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assert "assign irq_o[11] = gpio.irq_o;" in rib_irq
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assert "assign irq_o[12] = i2c1.irq_o;" in rib_irq
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assert "assign irq_o[13] = s_dvp_irq;" in rib_irq
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assert "assign irq_o[14] = s_dma_irq;" in rib_irq
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assert "assign irq_o[15] = opipsram.irq_o;" in rib_irq
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assert "assign irq_o[16] = sdio0.irq_o;" in rib_irq
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assert "assign irq_o[17] = sdio1.irq_o;" in rib_irq
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assert "assign irq_o[18] = s_crypto_irq;" in rib_irq
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assert "assign irq_o[19] = s_usb2_irq;" in rib_irq
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assert "assign irq_o[0] = pwm.irq_o;" in apb_irq
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assert "assign irq_o[4] = s_rng_irq;" in apb_irq
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assert "s_irq[10] = s_apb4_periph_irq[16];" in irq_wiring
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assert "s_irq[15] = s_apb4_periph_irq[13];" in irq_wiring
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assert "s_irq[16] = s_apb4_system_irq[4];" in irq_wiring
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assert "s_irq[20] = s_apb4_periph_irq[14];" in irq_wiring
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assert "s_irq[22] = s_apb4_periph_irq[15];" in irq_wiring
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assert "s_irq[21] = s_apb4_periph_irq[17];" in irq_wiring
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assert "s_irq[23] = s_apb4_periph_irq[18];" in irq_wiring
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assert "s_irq[24] = s_apb4_periph_irq[19];" in irq_wiring
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assert "irq_i[10] == apb4_periph_irq_i[16]" in irq_sva
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assert "irq_i[15] == apb4_periph_irq_i[13]" in irq_sva
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assert "irq_i[20] == apb4_periph_irq_i[14]" in irq_sva
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assert "irq_i[22] == apb4_periph_irq_i[15]" in irq_sva
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assert "irq_i[21] == apb4_periph_irq_i[17]" in irq_sva
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assert "irq_i[23] == apb4_periph_irq_i[18]" in irq_sva
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assert "irq_i[24] == apb4_periph_irq_i[19]" in irq_sva
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assert "irq_i[31] == 1'b0" in irq_sva
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assert "bind retrosoc soc_irq_topology_sva" in irq_sva
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assert filelist.startswith("+incdir+")
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def test_topology_preserves_default_irq_compatibility_mapping() -> None:
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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assert document["irq_vector_width"] == 32
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mappings = [
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(
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interrupt["name"],
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interrupt["group"],
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interrupt["group_bit"],
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interrupt["core_bit"],
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interrupt["signal"],
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)
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for interrupt in document["interrupts"]
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]
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assert mappings == [
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("clint_software", "apb4_periph", 0, 0, "u_clint_if.software_irq_o[0]"),
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("clint_timer", "apb4_periph", 1, 1, "u_clint_if.timer_irq_o[0]"),
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("uart0", "apb4_periph", 2, 2, "uart.irq_o"),
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("timer0", "apb4_periph", 3, 3, "s_tim0_irq"),
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("timer1", "apb4_periph", 4, 4, "s_tim1_irq"),
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("psram", "apb4_periph", 5, 5, "psram.irq_o"),
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("spisd", "apb4_periph", 6, 6, "spisd.irq_o"),
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("i2c0", "apb4_periph", 7, 7, "i2c0.irq_o"),
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("i2s", "apb4_periph", 8, 8, "i2s.irq_o"),
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("xpi", "apb4_periph", 9, 9, "s_xpi_irq"),
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("sdio0", "apb4_periph", 16, 10, "sdio0.irq_o"),
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("pwm", "apb4_system", 0, 11, "pwm.irq_o"),
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("ps2", "apb4_system", 1, 12, "ps2.irq_o"),
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("rtc", "apb4_system", 2, 13, "u_rtc_if.irq_o"),
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("watchdog_early_warning", "apb4_system", 3, 14, "u_wdg_if.irq_o"),
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("rng", "apb4_system", 4, 16, "s_rng_irq"),
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("ws2812", "apb4_periph", 10, 17, "ws2812.irq_o"),
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("gpio", "apb4_periph", 11, 18, "gpio.irq_o"),
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("i2c1", "apb4_periph", 12, 19, "i2c1.irq_o"),
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("dvp", "apb4_periph", 13, 15, "s_dvp_irq"),
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("dma", "apb4_periph", 14, 20, "s_dma_irq"),
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("opipsram", "apb4_periph", 15, 22, "opipsram.irq_o"),
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("sdio1", "apb4_periph", 17, 21, "sdio1.irq_o"),
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("crypto", "apb4_periph", 18, 23, "s_crypto_irq"),
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("usb2", "apb4_periph", 19, 24, "s_usb2_irq"),
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]
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def test_topology_always_adds_the_user_apb_target(tmp_path: Path) -> None:
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generate(tmp_path)
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interfaces = (tmp_path / "rtl/apb4_system_interfaces.svh").read_text(encoding="utf-8")
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declarations = (tmp_path / "rtl/apb4_system_declarations.svh").read_text(encoding="utf-8")
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response = (tmp_path / "rtl/apb4_system_response_mux.svh").read_text(encoding="utf-8")
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formal_design = (ROOT / "rtl/mini/formal/rib2apb_formal.sv").read_text(encoding="utf-8")
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formal_properties = (ROOT / "rtl/mini/formal/rib2apb_formal_props.sv").read_text(
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encoding="utf-8"
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)
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assert "apb4_if u_user_ip_apb4_if (clk_i, rst_n_i);" in interfaces
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assert "localparam int NSLV = 8;" in declarations
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assert "s_psel_q[7]" in response
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assert "apb4_pure_if user_ip ();" in formal_design
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assert ".user_ip (user_ip)" in formal_design
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assert "logic [ 7:0] psel_comb" in formal_design
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assert "wire [ 7:0] psel_comb" in formal_properties
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def test_topology_rejects_unknown_or_non_rib_regions(tmp_path: Path) -> None:
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["apb4_periph_targets"][0]["regions"] = ["UNKNOWN"]
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "unknown region" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["apb4_periph_targets"][0]["regions"] = ["SRAM"]
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "not an active apb4_periph region" in result.stderr
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def test_topology_rejects_duplicate_region_and_disabled_owner(tmp_path: Path) -> None:
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["apb4_periph_targets"][1]["regions"] = ["APB4_UART0"]
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "multiple targets" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["apb4_periph_targets"][15]["disabled"] = True
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document["apb4_periph_targets"][15]["regions"] = ["APB4_SDIO0"]
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "disabled but declares regions" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["fabric_links"][1]["name"] = "mgmt"
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "fabric role mgmt is duplicated" in result.stderr
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def test_topology_rejects_invalid_apb_target_ownership(tmp_path: Path) -> None:
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["apb4_system_targets"][0]["region"] = "SRAM"
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "not an active apb4_system region" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["apb4_system_targets"][7]["slot"] = 0
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "apb4_system_targets target slot 0 is duplicated" in result.stderr
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def test_topology_rejects_invalid_gpio_coverage_and_expression(tmp_path: Path) -> None:
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["gpio_alt_functions"][1]["pin"] = 0
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "gpio pin 0 is duplicated" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["gpio_alt_functions"].pop()
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "one entry for every GPIO pin" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["gpio_alt_functions"][0]["alt0"]["do"] = "left + right"
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "scalar SystemVerilog reference or constant" in result.stderr
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def test_topology_rejects_invalid_irq_groups_and_bindings(tmp_path: Path) -> None:
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["irq_groups"][1]["name"] = "apb4_periph"
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "interrupt group apb4_periph is duplicated" in result.stderr
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document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
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document["interrupts"][1]["group_bit"] = 0
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result = validate(write_invalid_topology(tmp_path, document))
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assert result.returncode != 0
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assert "interrupt group apb4_periph bit 0 is duplicated" in result.stderr
|
|
|
|
document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
|
|
document["interrupts"][1]["core_bit"] = 0
|
|
result = validate(write_invalid_topology(tmp_path, document))
|
|
assert result.returncode != 0
|
|
assert "core interrupt bit 0 is duplicated" in result.stderr
|
|
|
|
document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
|
|
rng_index = next(
|
|
index
|
|
for index, interrupt in enumerate(document["interrupts"])
|
|
if interrupt["name"] == "rng"
|
|
)
|
|
document["interrupts"].pop(rng_index)
|
|
result = validate(write_invalid_topology(tmp_path, document))
|
|
assert result.returncode != 0
|
|
assert "interrupt group apb4_system does not cover every group bit" in result.stderr
|
|
|
|
document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
|
|
document["interrupts"][0]["signal"] = "left | right"
|
|
result = validate(write_invalid_topology(tmp_path, document))
|
|
assert result.returncode != 0
|
|
assert "scalar SystemVerilog reference or constant" in result.stderr
|
|
|
|
document = json.loads(TOPOLOGY.read_text(encoding="utf-8"))
|
|
document["interrupts"][0]["signal"] = "uart.irq_o"
|
|
result = validate(write_invalid_topology(tmp_path, document))
|
|
assert result.returncode != 0
|
|
assert "core interrupt bit 0 must retain its compatibility binding" in result.stderr
|
|
|
|
|
|
def test_generated_irq_wiring_preserves_the_expected_core_vector(tmp_path: Path) -> None:
|
|
iverilog = shutil.which("iverilog")
|
|
vvp = shutil.which("vvp")
|
|
if iverilog is None or vvp is None:
|
|
return
|
|
|
|
topology_output = tmp_path / "topology"
|
|
generate(topology_output)
|
|
simulation = tmp_path / "soc_irq_topology_tb"
|
|
subprocess.run(
|
|
[
|
|
iverilog,
|
|
"-g2012",
|
|
"-I",
|
|
str(topology_output / "rtl"),
|
|
"-s",
|
|
"soc_irq_topology_tb",
|
|
"-o",
|
|
str(simulation),
|
|
str(ROOT / "tests/rtl/soc_irq_topology_tb.sv"),
|
|
],
|
|
check=True,
|
|
)
|
|
result = subprocess.run([vvp, str(simulation)], text=True, capture_output=True, check=True)
|
|
assert "SoC topology IRQ routing test passed" in result.stdout
|
|
|
|
|
|
def test_generated_rib_routes_select_and_return_the_expected_target(tmp_path: Path) -> None:
|
|
iverilog = shutil.which("iverilog")
|
|
sv2v = shutil.which("sv2v")
|
|
vvp = shutil.which("vvp")
|
|
if iverilog is None or sv2v is None or vvp is None:
|
|
return
|
|
|
|
memory_map_output = tmp_path / "memory_map"
|
|
subprocess.run(
|
|
[
|
|
sys.executable,
|
|
str(MEMORY_MAP_GENERATOR),
|
|
"--map",
|
|
str(MEMORY_MAP),
|
|
"--output-dir",
|
|
str(memory_map_output),
|
|
"--have-sram-if",
|
|
"NO",
|
|
],
|
|
check=True,
|
|
)
|
|
topology_output = tmp_path / "topology"
|
|
generate(topology_output)
|
|
|
|
source_list = tmp_path / "apb4_topology.fl"
|
|
source_list.write_text(
|
|
"\n".join(
|
|
[
|
|
"+define+SV_ASSRT_DISABLE",
|
|
f"+incdir+{memory_map_output / 'rtl'}",
|
|
f"+incdir+{topology_output / 'rtl'}",
|
|
f"+incdir+{ROOT / 'rtl/managed/clusterip/common/rtl'}",
|
|
f"+incdir+{ROOT / 'rtl/managed/clusterip/common/rtl/interface'}",
|
|
str(ROOT / "rtl/managed/clusterip/common/rtl/interface/apb4_if.sv"),
|
|
str(ROOT / "rtl/managed/clusterip/common/rtl/utils/register.sv"),
|
|
str(ROOT / "tests/rtl/apb4_topology_tb.sv"),
|
|
"",
|
|
]
|
|
),
|
|
encoding="utf-8",
|
|
)
|
|
converted = tmp_path / "apb4_topology_tb.v"
|
|
subprocess.run(
|
|
[
|
|
sys.executable,
|
|
str(ROOT / "rtl/mini/script/convt_sv2v.py"),
|
|
"-f",
|
|
str(source_list),
|
|
"--output",
|
|
str(converted),
|
|
],
|
|
check=True,
|
|
)
|
|
simulation = tmp_path / "apb4_topology_tb"
|
|
subprocess.run(
|
|
[
|
|
iverilog,
|
|
"-g2012",
|
|
"-s",
|
|
"apb4_topology_tb",
|
|
"-o",
|
|
str(simulation),
|
|
str(converted),
|
|
],
|
|
check=True,
|
|
)
|
|
result = subprocess.run([vvp, str(simulation)], text=True, capture_output=True, check=True)
|
|
assert "SoC topology APB4 routing test passed" in result.stdout
|