mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
c5dfa96c6f
- Replaced instances of nmi_if with rib_if in sysctrl_fault_tb.sv, test_dma.py, test_gpio_user_mux.py, test_memory_map.py, test_performance_log.py, test_script_tools.py, test_sdram.py, test_soc_topology.py, test_sta_constraints.py, and test_user_extensions.py. - Updated test cases to reflect changes from NMI to RIB, ensuring all references and assertions are consistent with the new interface. - Adjusted memory map and performance log tests to validate RIB-specific configurations and behaviors. - Ensured that all relevant file paths and definitions are updated to maintain functionality and correctness across the test suite.
31 lines
993 B
Systemverilog
31 lines
993 B
Systemverilog
// Copyright (c) 2023-2026 Yuchi Miao <miaoyuchi@ict.ac.cn>
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// retroSoC is licensed under Mulan PSL v2.
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// You can use this software according to the terms and conditions of the Mulan PSL v2.
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// You may obtain a copy of Mulan PSL v2 at:
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// http://license.coscl.org.cn/MulanPSL2
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// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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// EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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// MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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// See the Mulan PSL v2 for more details.
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`ifndef RIB_I2S_DEF_SV
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`define RIB_I2S_DEF_SV
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// verilog_format: off
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`define RIB_I2S_MODE 8'h00
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`define RIB_I2S_FORMAT 8'h04
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`define RIB_I2S_UPBOUND 8'h08
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`define RIB_I2S_LOWBOUND 8'h0C
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`define RIB_I2S_RECVEN 8'h10
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`define RIB_I2S_TXDATA 8'h14
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`define RIB_I2S_RXDATA 8'h18
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`define RIB_I2S_STATUS 8'h1C
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// verilog_format: on
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`define I2S_16b_48K 2'd0
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`define I2S_16b_96K 2'd1
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`define I2S_24b_48K 2'd2
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`define I2S_24b_96K 2'd3
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`endif
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