Files
retroSoC/configs
maksyuki ed19891bf5 feat: add support for ICS55 PDK in various components and tools
- Introduced Verilator and Yosys warning configurations for ICS55.
- Updated RTL filelists to include functional models for ICS55.
- Modified memory modules to use wire instead of logic for clock and reset signals.
- Enhanced Makefile and Iverilog configurations to support ICS55.
- Implemented new simulation cells for ICS55 in the tech library.
- Updated regression scripts and tests to include ICS55 support.
- Added functionality to prepare ICS55 liberty and simulation models.
- Enhanced testbench to validate ICS55 specific components and behaviors.
2026-08-01 11:55:49 +08:00
..

Reproducible Build Profiles

This directory contains committed Make configuration profiles. Each profile selects SoC, PDK, ISA, CSR support, application, linker layout, and the supported validation tier. The user-extension fabric is fixed; the management core defaults to HAZARD3 and may be set to PICORV32 with CORE.

ci/ contains pull-request profiles and cluster/ contains configurations requiring site tools or PDKs. The nightly workflow reuses the IHP130 CI profile. Start builds from a committed profile rather than setting an unreviewed mix of variables on the command line.

For supported profiles and commands, see the root README and agent contract.