mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
feat: modify pdk file path
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4 files changed
+59
-54
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@@ -1,4 +1,5 @@
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reports
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out
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WORK
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tmp
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*.log
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@@ -10,19 +10,19 @@ set yosys_dir [file dirname [file dirname [info script]]]
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set root_dir [file dirname $yosys_dir]
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if {[file exists "$root_dir/.cockpitrc"]} {
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puts "0. Executing init_tech: load technology from ETHZ DZ cockpit"
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set pdk_dir "$root_dir/technology"
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set pdk_cells_lib ${pdk_dir}/lib
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set pdk_sram_lib ${pdk_dir}/lib
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set pdk_io_lib ${pdk_dir}/lib
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puts "0. Executing init_tech: load technology from ETHZ DZ cockpit"
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set pdk_dir "$root_dir/technology"
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set pdk_cells_lib ${pdk_dir}/lib
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set pdk_sram_lib ${pdk_dir}/lib
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set pdk_io_lib ${pdk_dir}/lib
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} else {
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puts "0. Executing init_tech: load technology from Github PDK"
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if {![info exists pdk_dir]} {
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set pdk_dir "$root_dir/ihp13/pdk"
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}
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set pdk_cells_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib
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set pdk_sram_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_sram/lib
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set pdk_io_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_io/lib
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puts "0. Executing init_tech: load technology from Github PDK"
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if {![info exists pdk_dir]} {
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set pdk_dir "$root_dir/IHP-Open-PDK"
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}
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set pdk_cells_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib
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set pdk_sram_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_sram/lib
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set pdk_io_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_io/lib
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}
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set tech_cells [list "$pdk_cells_lib/sg13g2_stdcell_typ_1p20V_25C.lib"]
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@@ -44,5 +44,5 @@ set tech_cells_args [concat {*}$tech_cells_args_list]
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# read library files
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foreach file $lib_list {
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yosys read_liberty -lib "$file"
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yosys read_liberty -lib "$file"
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}
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@@ -21,25 +21,31 @@ set abc_comb_script [processAbcScript $abc_combinational_script]
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# read liberty files and prepare some variables
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source $script_dir/init_tech.tcl
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yosys plugin -i slang.so
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# yosys plugin -i slang.so
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# read design
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yosys read_slang --top $top_design -f $sv_flist \
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--compat-mode --keep-hierarchy \
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--allow-use-before-declare --ignore-unknown-modules
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# # read design
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# yosys read_slang --top $top_design -f $sv_flist \
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# --compat-mode --keep-hierarchy \
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# --allow-use-before-declare --ignore-unknown-modules
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yosys read_verilog ../../rtl/spram_model.v
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yosys read_verilog ../../rtl/picorv32.v
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yosys read_verilog ../../rtl/spimemio.v
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yosys read_verilog ../../rtl/simpleuart.v
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yosys read_verilog ../../rtl/picosoc.v
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yosys read_verilog ../../rtl/retrosoc.v
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# blackbox requested modules
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if { [info exists ::env(YOSYS_BLACKBOX_MODULES)] } {
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foreach sel $::env(YOSYS_BLACKBOX_MODULES) {
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puts "Blackboxing the module ${sel}"
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yosys select -list {*}$sel
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yosys blackbox {*}$sel
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yosys setattr -set keep_hierarchy 1 {*}$sel
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}
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}
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# # blackbox requested modules
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# if { [info exists ::env(YOSYS_BLACKBOX_MODULES)] } {
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# foreach sel $::env(YOSYS_BLACKBOX_MODULES) {
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# puts "Blackboxing the module ${sel}"
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# yosys select -list {*}$sel
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# yosys blackbox {*}$sel
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# yosys setattr -set keep_hierarchy 1 {*}$sel
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# }
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# }
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# preserve hierarchy of selected modules/instances
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# # preserve hierarchy of selected modules/instances
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if { [info exists ::env(YOSYS_KEEP_HIER_INST)] } {
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foreach sel $::env(YOSYS_KEEP_HIER_INST) {
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puts "Keeping hierarchy of selection: $sel"
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+24
-26
@@ -18,39 +18,37 @@ YOSYS_REPORTS := $(YOSYS_DIR)/reports
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# Project variables
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include $(YOSYS_DIR)/project-synth.mk
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TOP_DESIGN ?= croc_chip
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RTL_NAME ?= croc
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TOP_DESIGN ?= retrosoc
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RTL_NAME ?= retrosoc
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PICKLE_OUT := $(realpath $(YOSYS_DIR)/..)/pickle
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VLOG_FILES := $(PICKLE_OUT)/$(RTL_NAME)_sv2v.v
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VLOG_FILES := $(RTL_NAME)_sv2v.v
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NETLIST := $(YOSYS_OUT)/$(RTL_NAME)_yosys.v
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NETLIST_DEBUG := $(YOSYS_OUT)/$(RTL_NAME)_debug_yosys.v
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## Synthesize netlist using Yosys
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yosys: $(NETLIST)
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$(NETLIST) $(NETLIST_DEBUG): $(SV_FLIST)
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@mkdir -p $(YOSYS_OUT)
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@mkdir -p $(YOSYS_WORK)
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@mkdir -p $(YOSYS_REPORTS)
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SV_FLIST="$(SV_FLIST)" \
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TOP_DESIGN="$(TOP_DESIGN)" \
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PROJ_NAME="$(RTL_NAME)" \
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WORK="$(YOSYS_WORK)" \
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BUILD="$(YOSYS_OUT)" \
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REPORTS="$(YOSYS_REPORTS)" \
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NETLIST="$(NETLIST)" \
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$(YOSYS) -c $(YOSYS_DIR)/scripts/yosys_synthesis.tcl \
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2>&1 | TZ=UTC gawk '{ print strftime("[%Y-%m-%d %H:%M %Z]"), $$0 }' \
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| tee "$(YOSYS_DIR)/$(RTL_NAME).log" \
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| gawk -f $(YOSYS_DIR)/scripts/filter_output.awk;
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$(NETLIST) $(NETLIST_DEBUG):
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@mkdir -p $(YOSYS_OUT)
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@mkdir -p $(YOSYS_WORK)
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@mkdir -p $(YOSYS_REPORTS)
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SV_FLIST="$(SV_FLIST)" \
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TOP_DESIGN="$(TOP_DESIGN)" \
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PROJ_NAME="$(RTL_NAME)" \
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WORK="$(YOSYS_WORK)" \
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BUILD="$(YOSYS_OUT)" \
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REPORTS="$(YOSYS_REPORTS)" \
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NETLIST="$(NETLIST)" \
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$(YOSYS) -c $(YOSYS_DIR)/scripts/yosys_synthesis.tcl \
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2>&1 | TZ=UTC gawk '{ print strftime("[%Y-%m-%d %H:%M %Z]"), $$0 }' \
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| tee "$(YOSYS_DIR)/$(RTL_NAME).log" \
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| gawk -f $(YOSYS_DIR)/scripts/filter_output.awk;
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ys_clean:
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rm -rf $(YOSYS_OUT)
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rm -rf $(YOSYS_WORK)
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rm -rf $(YOSYS_REPORTS)
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rm -f $(YOSYS_DIR)/$(RTL_NAME).log
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rm -rf $(YOSYS_OUT)
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rm -rf $(YOSYS_WORK)
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rm -rf $(YOSYS_REPORTS)
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rm -f $(YOSYS_DIR)/$(RTL_NAME).log
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.PHONY: ys_clean yosys synth yosys-slang
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.PHONY: ys_clean yosys synth $(NETLIST) $(NETLIST_DEBUG)
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