Merge pull request #11 from retroSoC/dev

Dev

rtl/mini/filelist/ip.fl

@@ -23,6 +23,7 @@
 ../../clusterip/i2c/rtl/i2c_master_byte_ctrl.sv
 ../../clusterip/i2c/rtl/apb4_i2c.sv
 ../../clusterip/spi/rtl/apb4_spi.sv
+../../clusterip/spi/rtl/spi_if.sv
 ../../clusterip/spi/rtl/spi_clkgen.sv
 ../../clusterip/spi/rtl/spi_apb_if.sv
 ../../clusterip/spi/rtl/spi_ctrl.sv

rtl/mini/tb/retrosoc_tb.sv

@@ -249,11 +249,11 @@ module retrosoc_tb;
     else r_pll_cfg = 3'd0;  // 24M
 
     if (r_pll_en == 1'b0) begin
-      $display("pll_en: %d pll_cfg: %d clk_freq: %dMHz", r_pll_en, r_pll_cfg, EXT_CPU_FREQ);
+      $display("pll_en: %0d pll_cfg: %0d clk_freq: %0dMHz", r_pll_en, r_pll_cfg, EXT_CPU_FREQ);
     end else if (r_pll_cfg == 3'd0 || r_pll_cfg == 3'd1) begin
-      $display("pll_en: %d pll_cfg: %d clk_freq: %dMHz", r_pll_en, r_pll_cfg, XTAL_CPU_FREQ);
+      $display("pll_en: %0d pll_cfg: %0d clk_freq: %0dMHz", r_pll_en, r_pll_cfg, XTAL_CPU_FREQ);
     end else begin
-      $display("pll_en: %d pll_cfg: %d clk_freq: %dMHz", r_pll_en, r_pll_cfg, (r_pll_cfg + 1) * 24);
+      $display("pll_en: %0d pll_cfg: %0d clk_freq: %0dMHz", r_pll_en, r_pll_cfg, (r_pll_cfg + 1) * 24);
     end
   end
 endmodule

rtl/tech/tc_sram.sv

@@ -9,6 +9,7 @@ module tc_sram_1024x32 (
 );
 
 `ifdef PDK_BEHAV
+`ifdef HAVE_SRAM
   logic [31:0] r_data;
   logic [31:0] mem    [0:1023];
 
@@ -26,6 +27,7 @@ module tc_sram_1024x32 (
       end
     end
   end
+`endif
 `elsif PDK_IHP130
 `ifdef HAVE_SRAM
   logic [63:0] s_rd_data_mem;