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feat: modify retrosoc top for the fpga
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@@ -17,7 +17,7 @@ module retrosoc_top (
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.clk_out1(clk_core)
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);
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retrosoc #(
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retrosoc_asic #(
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.MEM_WORDS(256)
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) u_retrosoc (
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.clk_i (clk_core),
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