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maksyuki
57ffd03216
- Modified test_apu_register_parity.py to reflect changes in P4 ISA definitions. - Updated test_apu_register_parity.py to include new manifest entries for P4. - Enhanced test_script_tools.py to include checks for APU primitives filelists. - Added assertions for APU primitives in the formal filelists test to ensure proper scoping and inclusion.
RIB and Experimental IP
This directory owns project RTL IP.
Self-owned IP is grouped by function: interconnect, util, memory, storage, serial, USB, multimedia, and peripheral. The Mini SoC selects active sources explicitly in rtl/mini/filelist/ip.fl, whose source order is part of the build contract.
experimental contains retained inactive RTL. It is not included by any active filelist and must not become a build dependency without an explicit integration change and matching validation.