mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-05 06:32:37 +00:00
- Introduced to handle the preparation of the SKY130 OpenRAM SRAM views. - Updated to download and prepare the SRAM archive during PDK setup. - Enhanced OpenSTA and Yosys configurations to accommodate SRAM macro integration. - Added Verilog simulation models for GF180 and SKY130 SRAM macros. - Implemented tests for SRAM setup and validation, ensuring correct integration and functionality. - Updated various Makefiles and scripts to support SRAM size and macro configurations.
IP Documentation
This directory owns architecture, register ABI, software contract, and verification documentation for self-owned retroSoC peripheral IP and platform extension interfaces.
- timer.md defines the dual APB4 general timer.
- sysctrl.md defines the APB4 SystemCtrl register ABI, control-plane contracts, HAL, and verification.
- user-ip.md defines the selectable user-IP window and software ownership boundary.
- ws2812.md defines the WS2812 transmitter.
- clint.md defines the management-hart software and timer interrupt block.
- gpio.md defines the dual-window GPIO controller.
- uart.md defines the APB4 UART controller.
- i2c.md defines the dual APB4 I2C controllers.
- dvp.md defines the APB4 DVP capture controller.
- i2s.md defines the APB4 I2S master transceiver.
- usb2.md defines the dual-role ULPI USB 2.0 controller, AXI4 descriptor DMA, dedicated-pad integration, HAL, and commercial release gates.
- mini-npu.md records the commercial NPU reference survey and optional Mini-AI architecture direction; it does not define implemented RTL or ABI.
- sdram.md defines the AXI4 SDRAM data controller and APB4 configuration window.
- xpi.md defines the native-AXI4/APB4 XPI V2 controller, commercial reference survey, LUT and PHY contracts, HAL, JTAG NOR programming, and delivery boundary.
The corresponding RTL and HAL implementations remain the executable sources of truth. Update the affected document whenever an IP interface or register ABI changes.