mirror of
https://github.com/retroSoC/retroSoC.git
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7d064ce78225ce535e50b5a49af16b70ff05c240
- Added to manage Git repository dependencies and file downloads. - Refactored to utilize the new helper functions for cloning the MPW generator. - Enhanced OpenSTA Makefile to validate input files and configurations before execution. - Updated OpenSTA TCL script to use environment variables for file paths. - Refactored source export script to improve file handling and path resolution. - Added tests for atomic writing, filelist parsing, and dependency management. - Improved Yosys synthesis scripts to include configuration recording.
retroSoC
Build automation
Run make help for the supported build targets and make config for the active
configuration. make doctor checks the selected simulator, synthesis/STA tools,
RISC-V compiler, PDK, and external source trees before a long build starts.
External dependencies are pinned to known commits. Install them with make setup;
individual targets such as setup-pdk, setup-ip, and setup-app are also
available. Setup scripts are idempotent and accept --update when an existing
checkout must be moved to the pinned revision.
Typical open-source flows are:
make PROG_TYPE=BASE firmware
make SIMU=VERILATOR sim
make SIMU=IVERILOG sim
make SYNTH=YOSYS synth
make STA=OPENSTA sta
Generated outputs are isolated under ignored build directories. make clean
cleans the selected simulator backend and make clean-all removes all generated
flow output while leaving dependency checkouts intact.
Description
A Customized ASIC framework for Retro Stuff!
13 MiB
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Languages
SystemVerilog
55.6%
Python
25.1%
C
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Typst
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Makefile
1.8%
Other
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