Commit Graph
100 Commits
Author SHA1 Message Date
maksyuki 7d064ce782 feat: implement setup helpers and refactor setup script
- Added  to manage Git repository dependencies and file downloads.
- Refactored  to utilize the new helper functions for cloning the MPW generator.
- Enhanced OpenSTA Makefile to validate input files and configurations before execution.
- Updated OpenSTA TCL script to use environment variables for file paths.
- Refactored source export script to improve file handling and path resolution.
- Added tests for atomic writing, filelist parsing, and dependency management.
- Improved Yosys synthesis scripts to include configuration recording.
2026-07-10 13:13:59 +08:00
maksyuki 2fc59c8cc5 feat: add third-party attribution and licensing information to the repository 2026-07-07 11:06:07 +08:00
maksyuki f652cf81b8 fix: fix the wrong wr strobe signal in ochip ram module 2026-06-25 11:04:13 +08:00
maksyuki e2ce63610a fix: fix the wrong esp32 sim module path 2026-03-26 22:05:43 +08:00
maksyuki 3afed0e614 chore: mv sim model to single new dir 2026-03-26 21:59:31 +08:00
maksyuki d10b1e1a29 fix: fix inout pin bug for rstn and uart0_rx input 2026-03-24 23:09:40 +08:00
maksyuki 3652385ea1 feat: add register slice to bus modules to optimize timing 2026-03-24 22:56:23 +08:00
maksyuki adbe806548 feat: use shift register to optimze the timing for i2s send/recv modules 2026-03-24 15:17:10 +08:00
maksyuki 6e51304e14 feat: modify fifo impl to solve timing issues 2026-03-24 10:19:39 +08:00
maksyuki c09cb18649 fix: add missing mclk generated clk define 2026-03-23 21:42:45 +08:00
maksyuki 75b6651023 feat: use seperate method to add r_mem impl 2026-03-23 17:33:29 +08:00
maksyuki da13360c49 fix: remove unused clk define for pll 2026-03-23 16:35:27 +08:00
maksyuki fc737b6b31 feat: modify pin constr and top wire for fpga 2026-03-23 15:17:16 +08:00
maksyuki c749a1d3c2 feat: change folder name 'makefile' to 'mk' to support win11 NTFS 2026-03-23 13:05:10 +08:00
maksyuki bf3023fad9 feat: modify top wire for fpga 2026-03-23 12:00:29 +08:00
maksyuki 2670b5e002 feat: init sta files 2026-03-22 20:53:00 +08:00
maksyuki cefb639758 chore: add netlist simu for iverilog 2026-03-21 23:24:49 +08:00
maksyuki efab34f276 feat: add netlist sim for iverilog 2026-03-21 23:22:55 +08:00
maksyuki 0c0d810a42 chore: mv tool python script to new folder 2026-03-21 18:33:25 +08:00
maksyuki 9fd61a213a chore: change the dir name for makefile 2026-03-21 18:27:07 +08:00
maksyuki c386ab5794 fix: fix the additional '#' before verilator comp cmd 2026-03-21 16:51:30 +08:00
maksyuki 5325f60a77 fix: fix the wrong sequence of ln cmd 2026-03-21 16:47:11 +08:00
maksyuki 12b2ac04d9 fix: fix a typo in 3rd-party norflash config file path 2026-03-21 16:28:39 +08:00
maksyuki 7f0e95cb06 fix: add os system task for copying norflash config 2026-03-21 16:18:19 +08:00
maksyuki 22a2b1d66f fix: add mkdir oper before convert sv to verilog files 2026-03-21 16:06:49 +08:00
maksyuki 447c766d07 chore: add iverilog norflash config files generate step 2026-03-21 15:58:31 +08:00
maksyuki c362079260 fix: fix a wrong cmd args for opensta test step 2026-03-21 11:57:10 +08:00
maksyuki 6c5c0fa356 fix: fix a typo in opensta artifact setup step 2026-03-21 11:55:01 +08:00
maksyuki 6452f000c8 fix: fix a typo in iverilog artifact setup step 2026-03-21 11:52:53 +08:00
maksyuki 357a2808e4 fix: remove unused bin path in sv2v artifact 2026-03-21 11:50:20 +08:00
maksyuki 9e0d382104 chore: add sv2v, iverilog and opensta to test flow 2026-03-21 11:46:49 +08:00
maksyuki 6c1e519606 feat: modify iverilog behv simulation script 2026-03-21 11:34:15 +08:00
maksyuki 68c7ff8401 chore: add generated filelist to support different target comp in different folder 2026-03-18 16:46:25 +08:00
maksyuki 650559df4d chore: split ip filelist into smaller one and add condi inc for debug 2026-03-18 11:01:06 +08:00
maksyuki 79e457177c chore: simplify the vcs comp options 2026-03-17 21:48:01 +08:00
maksyuki bf08ed1d68 chore: replace wave comp flag with binary check format 2026-03-17 19:52:52 +08:00
maksyuki 95c62a0792 fix: fix the logic-loop due to latch 2026-03-17 14:02:18 +08:00
maksyuki a1861bd5d5 feat: add init trg for psram and format some name of module 2026-03-16 15:44:33 +08:00
maksyuki 23f25eaa53 feat: add new module to implement flash read binder 2026-03-16 14:59:46 +08:00
maksyuki 97b20edfe6 fix: use hacking method to run prog on psram 2026-03-16 14:37:43 +08:00
maksyuki c5ce8b3824 style: remove 'qspi' prefix in all sw&hw 2026-03-16 11:06:38 +08:00
maksyuki e654bc95ff fix: fix the same reg name of xpi 2026-03-14 16:51:34 +08:00
maksyuki 745f8980c8 fix: remove unuse signals in gpio top connect 2026-03-14 16:41:12 +08:00
maksyuki beec183004 style: change 'qspi' prefix in xpi module into 'xpi' 2026-03-14 16:24:06 +08:00
maksyuki 6694ba5dee style: format all low-speed ip if name 2026-03-14 16:04:36 +08:00
maksyuki 4efb9c6c65 style: chg the name of spi into xpi 2026-03-14 15:30:58 +08:00
maksyuki 6d729f1630 fix: fix the missing in top of verilator file 2026-03-14 15:18:13 +08:00
maksyuki 19f7131946 feat: use gpio to pinmux all application ip 2026-03-14 15:08:16 +08:00
maksyuki fcf774e924 style: change all 'qspi' prefix in crt 2026-03-13 21:22:32 +08:00
maksyuki 39daccc8e2 style: format the addr define list 2026-03-13 21:21:28 +08:00
maksyuki 4823363555 feat: add void opisdram and sdio module 2026-03-13 20:53:45 +08:00
maksyuki 62c42784a6 style: mv 'natv' prefix to 'nmi' prefix 2026-03-13 20:16:09 +08:00
maksyuki 837e82f1ce feat: add psram1 module src header files 2026-03-13 13:43:54 +08:00
maksyuki 7fb420e9aa feat: dont test ip mdd integration mode 2026-03-12 12:54:53 +08:00
maksyuki 278cdf0cb3 style: remove spaces in module port defines 2026-03-12 12:47:03 +08:00
maksyuki 6ccc8bcb60 add debug statement for verilator 2026-03-12 12:34:55 +08:00
maksyuki aa41f85c2d chore: add mdd test func 2026-03-12 12:26:49 +08:00
maksyuki 07ba7ca5a3 chore: rm debug statement for verilator 2026-03-12 12:17:20 +08:00
maksyuki 59aa8d2788 fix: remove depth 1 limition for ihp pdk 2026-03-12 12:12:37 +08:00
maksyuki fa6d4c5fcc fix: fix the pdk version for ihp 2026-03-12 12:08:36 +08:00
maksyuki 3bf87bcbf9 fix: limit the fixed version for ihp pdk 2026-03-12 12:02:03 +08:00
maksyuki d604b1cd8d style: simplify the if name of gpio module 2026-03-12 11:50:54 +08:00
maksyuki 8a1ff6937a style: simplify the if name of i2s module 2026-03-12 11:37:51 +08:00
maksyuki 4714035f2f feat: add irq and pinmux to gpio module 2026-03-11 16:11:19 +08:00
maksyuki 4b188a77f3 feat: add init dtr mode psram mmio addr 2026-03-11 14:40:50 +08:00
maksyuki 91eb106f52 feat: switch default core from picorv32 to hazard3 2026-03-11 14:25:47 +08:00
maksyuki 5f279951f6 fix: add missing vss/vdd io for ics55 2026-03-11 12:13:27 +08:00
maksyuki 57307f5ba1 fix: add independent core modified operation 2026-03-11 12:07:49 +08:00
maksyuki 8ed22a67e9 chore: add debug statement for verilator 2026-03-11 11:48:46 +08:00
maksyuki fd025c5a5e chore: add ics55 pdk support 2026-03-11 11:35:02 +08:00
maksyuki 8a87fe0f2a style: update license header date 2026-03-07 15:03:21 +08:00
maksyuki b60bd5eb64 chore: add depth control for git clone command 2026-03-05 14:29:48 +08:00
maksyuki adf18fe453 chore: add extra compile tool for compiling 2026-03-02 15:49:56 +08:00
maksyuki 81113e15f1 chore: add more debug info 2026-03-02 15:31:36 +08:00
maksyuki 61a47dab9a chore: use single core to debug verilator sim process 2026-03-02 15:10:51 +08:00
maksyuki bd82e77432 feat: use extra verilator artifact to replace comp process in aciton file 2026-03-02 15:01:07 +08:00
maksyuki 6157467915 fix: fix the position of yosys version info 2026-03-02 09:41:56 +08:00
maksyuki e9ed686220 chore: add extra debug info for yosys 2026-03-02 09:39:47 +08:00
maksyuki 6d4a715369 feat: add debug info for yosys download 2026-03-02 09:37:54 +08:00
maksyuki 04474ca084 feat: add artifact config page for yosys 2026-03-02 09:31:42 +08:00
maksyuki 987efcf4f2 chore: use default path for yosys plugin loading 2026-03-01 16:06:15 +08:00
maksyuki ac6971e972 fix: add missing gpio define inc 2026-03-01 16:05:17 +08:00
maksyuki 90abeaaa51 chore: add install yosys tool in the action file 2026-02-28 12:57:28 +08:00
maksyuki 5ea4524276 feat: rm tiny design file 2026-02-07 16:25:21 +08:00
maksyuki 6dbc560416 feat: add init sdio components 2026-02-07 12:38:37 +08:00
maksyuki e1d4b9c319 feat: add init simple gpu module 2026-02-07 12:35:53 +08:00
maksyuki 1970129162 feat: update the test of i2s module 2026-01-31 13:31:53 +08:00
maksyuki 941cbad7c1 feat: add reg and clkgen module of i2s ip 2026-01-31 10:05:53 +08:00
maksyuki 2322acbe9a feat: add multi bit width and sample ratio support 2026-01-30 23:38:35 +08:00
maksyuki 8222c450d7 feat: change aud clk from 12.288 to 18.432M in tb 2026-01-30 18:05:21 +08:00
maksyuki 19f97b5176 style: format some codes and comments in i2s module 2026-01-30 12:36:40 +08:00
maksyuki 68329735e3 feat: add clk div func and reg for the sdram ip 2026-01-29 17:26:54 +08:00
maksyuki 01408139c8 feat: split sdram main func into core module 2026-01-29 13:01:57 +08:00
maksyuki f8759681fa fix: fix the wrong pix cnt reg naming 2026-01-29 12:43:25 +08:00
maksyuki d239278431 feat: add timing param for dvp camera model 2026-01-29 12:17:26 +08:00
maksyuki 51dea870e7 feat: add init version of dvp camera sim model 2026-01-28 17:18:03 +08:00
maksyuki 481d6377d5 chore: rm unused tb port from qspi if 2026-01-27 16:40:14 +08:00
maksyuki e4a8a1ffa1 feat: add init dvp ip design 2026-01-27 16:38:25 +08:00
maksyuki a965becfe8 fix: fix the wrong sdram addr range 2026-01-27 11:17:50 +08:00
maksyuki fa9cba0ae1 fix: fix the static tRFC value in auto refresh phase 2026-01-24 12:48:48 +08:00