maksyuki
467ff803e7
fix: update actions/cache to v4.3.0 in workflows
2026-07-10 17:55:36 +08:00
maksyuki
57c9d334ea
feat: refactor MPW preparation and add regression and flow scripts
...
- Updated to utilize a new dependency locking mechanism and improved repository management.
- Introduced for running regression tests with configurable command sets for different profiles.
- Added to execute commands with structured logging and result reporting.
- Enhanced to support fetching specific revisions from git repositories.
- Modified to use the new dependency source structure.
- Updated OpenSTA makefile and TCL script to include metrics reporting.
- Improved synthesis scripts to utilize the new flow execution model.
- Added tests for dependency locking, flow execution, and warning analysis.
- Ensured that all scripts and tools are consistent with the new structure and functionality.
2026-07-10 17:48:11 +08:00
maksyuki
7d064ce782
feat: implement setup helpers and refactor setup script
...
- Added to manage Git repository dependencies and file downloads.
- Refactored to utilize the new helper functions for cloning the MPW generator.
- Enhanced OpenSTA Makefile to validate input files and configurations before execution.
- Updated OpenSTA TCL script to use environment variables for file paths.
- Refactored source export script to improve file handling and path resolution.
- Added tests for atomic writing, filelist parsing, and dependency management.
- Improved Yosys synthesis scripts to include configuration recording.
2026-07-10 13:13:59 +08:00
maksyuki
2fc59c8cc5
feat: add third-party attribution and licensing information to the repository
2026-07-07 11:06:07 +08:00
maksyuki
f652cf81b8
fix: fix the wrong wr strobe signal in ochip ram module
2026-06-25 11:04:13 +08:00
maksyuki
e2ce63610a
fix: fix the wrong esp32 sim module path
2026-03-26 22:05:43 +08:00
maksyuki
3afed0e614
chore: mv sim model to single new dir
2026-03-26 21:59:31 +08:00
maksyuki
d10b1e1a29
fix: fix inout pin bug for rstn and uart0_rx input
2026-03-24 23:09:40 +08:00
maksyuki
3652385ea1
feat: add register slice to bus modules to optimize timing
2026-03-24 22:56:23 +08:00
maksyuki
adbe806548
feat: use shift register to optimze the timing for i2s send/recv modules
2026-03-24 15:17:10 +08:00
maksyuki
6e51304e14
feat: modify fifo impl to solve timing issues
2026-03-24 10:19:39 +08:00
maksyuki
c09cb18649
fix: add missing mclk generated clk define
2026-03-23 21:42:45 +08:00
maksyuki
75b6651023
feat: use seperate method to add r_mem impl
2026-03-23 17:33:29 +08:00
maksyuki
da13360c49
fix: remove unused clk define for pll
2026-03-23 16:35:27 +08:00
maksyuki
fc737b6b31
feat: modify pin constr and top wire for fpga
2026-03-23 15:17:16 +08:00
maksyuki
c749a1d3c2
feat: change folder name 'makefile' to 'mk' to support win11 NTFS
2026-03-23 13:05:10 +08:00
maksyuki
bf3023fad9
feat: modify top wire for fpga
2026-03-23 12:00:29 +08:00
maksyuki
2670b5e002
feat: init sta files
2026-03-22 20:53:00 +08:00
maksyuki
cefb639758
chore: add netlist simu for iverilog
2026-03-21 23:24:49 +08:00
maksyuki
efab34f276
feat: add netlist sim for iverilog
2026-03-21 23:22:55 +08:00
maksyuki
0c0d810a42
chore: mv tool python script to new folder
2026-03-21 18:33:25 +08:00
maksyuki
9fd61a213a
chore: change the dir name for makefile
2026-03-21 18:27:07 +08:00
maksyuki
c386ab5794
fix: fix the additional '#' before verilator comp cmd
2026-03-21 16:51:30 +08:00
maksyuki
5325f60a77
fix: fix the wrong sequence of ln cmd
2026-03-21 16:47:11 +08:00
maksyuki
12b2ac04d9
fix: fix a typo in 3rd-party norflash config file path
2026-03-21 16:28:39 +08:00
maksyuki
7f0e95cb06
fix: add os system task for copying norflash config
2026-03-21 16:18:19 +08:00
maksyuki
22a2b1d66f
fix: add mkdir oper before convert sv to verilog files
2026-03-21 16:06:49 +08:00
maksyuki
447c766d07
chore: add iverilog norflash config files generate step
2026-03-21 15:58:31 +08:00
maksyuki
c362079260
fix: fix a wrong cmd args for opensta test step
2026-03-21 11:57:10 +08:00
maksyuki
6c5c0fa356
fix: fix a typo in opensta artifact setup step
2026-03-21 11:55:01 +08:00
maksyuki
6452f000c8
fix: fix a typo in iverilog artifact setup step
2026-03-21 11:52:53 +08:00
maksyuki
357a2808e4
fix: remove unused bin path in sv2v artifact
2026-03-21 11:50:20 +08:00
maksyuki
9e0d382104
chore: add sv2v, iverilog and opensta to test flow
2026-03-21 11:46:49 +08:00
maksyuki
6c1e519606
feat: modify iverilog behv simulation script
2026-03-21 11:34:15 +08:00
maksyuki
68c7ff8401
chore: add generated filelist to support different target comp in different folder
2026-03-18 16:46:25 +08:00
maksyuki
650559df4d
chore: split ip filelist into smaller one and add condi inc for debug
2026-03-18 11:01:06 +08:00
maksyuki
79e457177c
chore: simplify the vcs comp options
2026-03-17 21:48:01 +08:00
maksyuki
bf08ed1d68
chore: replace wave comp flag with binary check format
2026-03-17 19:52:52 +08:00
maksyuki
95c62a0792
fix: fix the logic-loop due to latch
2026-03-17 14:02:18 +08:00
maksyuki
a1861bd5d5
feat: add init trg for psram and format some name of module
2026-03-16 15:44:33 +08:00
maksyuki
23f25eaa53
feat: add new module to implement flash read binder
2026-03-16 14:59:46 +08:00
maksyuki
97b20edfe6
fix: use hacking method to run prog on psram
2026-03-16 14:37:43 +08:00
maksyuki
c5ce8b3824
style: remove 'qspi' prefix in all sw&hw
2026-03-16 11:06:38 +08:00
maksyuki
e654bc95ff
fix: fix the same reg name of xpi
2026-03-14 16:51:34 +08:00
maksyuki
745f8980c8
fix: remove unuse signals in gpio top connect
2026-03-14 16:41:12 +08:00
maksyuki
beec183004
style: change 'qspi' prefix in xpi module into 'xpi'
2026-03-14 16:24:06 +08:00
maksyuki
6694ba5dee
style: format all low-speed ip if name
2026-03-14 16:04:36 +08:00
maksyuki
4efb9c6c65
style: chg the name of spi into xpi
2026-03-14 15:30:58 +08:00
maksyuki
6d729f1630
fix: fix the missing in top of verilator file
2026-03-14 15:18:13 +08:00
maksyuki
19f7131946
feat: use gpio to pinmux all application ip
2026-03-14 15:08:16 +08:00
maksyuki